Sei Seung Yoon

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory repair enablement
- Patent number 10,713,136
- Issue date Jul 14, 2020
- QUALCOMM Incorporated
- Fahad Ahmed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible power sequencing for dual-power memory
- Patent number 10,446,196
- Issue date Oct 15, 2019
- QUALCOMM Incorporated
- Mukund Narasimhan
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods to provide security to one time program data
- Patent number 10,318,726
- Issue date Jun 11, 2019
- QUALCOMM Incorporated
- Anil Kota
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage droop control
- Patent number 10,133,285
- Issue date Nov 20, 2018
- QUALCOMM Incorporated
- Sanjay Bhagawan Patil
- G05 - CONTROLLING REGULATING
Information Patent Grant
Flexible memory assistance scheme
- Patent number 10,049,729
- Issue date Aug 14, 2018
- QUALCOMM Incorporated
- Esin Terzioglu
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed level shifter
- Patent number 9,997,208
- Issue date Jun 12, 2018
- QUALCOMM Incorporated
- Chulmin Jung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Lower power high speed decoding based dynamic tracking for memories
- Patent number 9,978,442
- Issue date May 22, 2018
- QUALCOMM Incorporated
- Bin Liang
- G11 - INFORMATION STORAGE
Information Patent Grant
Timed sense amplifier circuits and methods in a semiconductor memory
- Patent number 9,959,912
- Issue date May 1, 2018
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed word line decoder and level-shifter
- Patent number 9,940,987
- Issue date Apr 10, 2018
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for latching data including AND-NOR or OR-NAND...
- Patent number 9,941,881
- Issue date Apr 10, 2018
- QUALCOMM Incorporated
- Changho Jung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage droop control
- Patent number 9,851,730
- Issue date Dec 26, 2017
- QUALCOMM Incorporated
- Sanjay Bhagawan Patil
- G05 - CONTROLLING REGULATING
Information Patent Grant
Efficient coding for memory redundancy
- Patent number 9,748,003
- Issue date Aug 29, 2017
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Scannable memories with robust clocking methodology to prevent inad...
- Patent number 9,666,301
- Issue date May 30, 2017
- QUALCOMM Incorporated
- Venugopal Boynapalli
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell with improved write margin
- Patent number 9,646,681
- Issue date May 9, 2017
- QUALCOMM Incorporated
- Changho Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with a voltage-adjustment circuit to adjust the operating vo...
- Patent number 9,627,041
- Issue date Apr 18, 2017
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for reducing programming voltage stress on memory...
- Patent number 9,570,192
- Issue date Feb 14, 2017
- QUALCOMM Incorporated
- Sei Seung Yoon
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for writing data to memory array circuits
- Patent number 9,536,578
- Issue date Jan 3, 2017
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Mask-programmed read only memory with enhanced security
- Patent number 9,484,110
- Issue date Nov 1, 2016
- QUALCOMM Incorporated
- Sei Seung Yoon
- G11 - INFORMATION STORAGE
Information Patent Grant
Write driver for memory
- Patent number 9,401,201
- Issue date Jul 26, 2016
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier with pulsed control for pull-up transistors
- Patent number 9,373,388
- Issue date Jun 21, 2016
- QUALCOMM Incorporated
- Fahad Ahmed
- G11 - INFORMATION STORAGE
Information Patent Grant
Pseudo dual port memory with dual latch flip-flop
- Patent number 9,324,416
- Issue date Apr 26, 2016
- QUALCOMM Incorporated
- Sei Seung Yoon
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for low-level input sense amplification
- Patent number 9,318,165
- Issue date Apr 19, 2016
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
N-well switching circuit
- Patent number 9,252,765
- Issue date Feb 2, 2016
- QUALCOMM Incorporated
- Esin Terzioglu
- G11 - INFORMATION STORAGE
Information Patent Grant
Write word-line assist circuitry for a byte-writeable memory
- Patent number 9,202,555
- Issue date Dec 1, 2015
- QUALCOMM Incorporated
- Changho Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for reading data from multi-bank memory circuits
- Patent number 9,165,619
- Issue date Oct 20, 2015
- QUALCOMM Incorporated
- Hui Song
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory timing circuit
- Patent number 9,111,589
- Issue date Aug 18, 2015
- QUALCOMM Incorporated
- Rakesh Kumar Sinha
- G11 - INFORMATION STORAGE
Information Patent Grant
Weak keeper circuit for memory device
- Patent number 9,082,465
- Issue date Jul 14, 2015
- QUALCOMM Incorporated
- Balachander Ganesan
- G11 - INFORMATION STORAGE
Information Patent Grant
N-well switching circuit
- Patent number 9,082,498
- Issue date Jul 14, 2015
- QUALCOMM Incorporated
- Gregory Ameriada Uvieghara
- G11 - INFORMATION STORAGE
Information Patent Grant
Static NAND cell for ternary content addressable memory (TCAM)
- Patent number 9,082,481
- Issue date Jul 14, 2015
- QUALCOMM Incorporated
- Esin Terzioglu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and semiconductor apparatus for reducing power when transmit...
- Patent number 9,071,239
- Issue date Jun 30, 2015
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY REPAIR ENABLEMENT
- Publication number 20190095295
- Publication date Mar 28, 2019
- QUALCOMM Incorporated
- Fahad AHMED
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOWER POWER HIGH SPEED DECODING BASED DYNAMIC TRACKING FOR MEMORIES
- Publication number 20180068714
- Publication date Mar 8, 2018
- QUALCOMM Incorporated
- Bin LIANG
- G11 - INFORMATION STORAGE
Information Patent Application
VOLTAGE DROOP CONTROL
- Publication number 20180046209
- Publication date Feb 15, 2018
- QUALCOMM Incorporated
- Sanjay Bhagawan Patil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and Methods to Provide Security to One Time Program Data
- Publication number 20170300251
- Publication date Oct 19, 2017
- QUALCOMM Incorporated
- Anil Kota
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIMED SENSE AMPLIFIER CIRCUITS AND METHODS IN A SEMICONDUCTOR MEMORY
- Publication number 20170221551
- Publication date Aug 3, 2017
- QUALCOMM Incorporated
- Chulmin JUNG
- G11 - INFORMATION STORAGE
Information Patent Application
VOLTAGE DROOP CONTROL
- Publication number 20160299517
- Publication date Oct 13, 2016
- QUALCOMM Incorporated
- Sanjay Bhagawan Patil
- G05 - CONTROLLING REGULATING
Information Patent Application
HIGH-SPEED WORD LINE DECODER AND LEVEL-SHIFTER
- Publication number 20160276005
- Publication date Sep 22, 2016
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Application
EFFICIENT CODING FOR MEMORY REDUNDANCY
- Publication number 20160078969
- Publication date Mar 17, 2016
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Application
SCANNABLE MEMORIES WITH ROBUST CLOCKING METHODOLOGY TO PREVENT INAD...
- Publication number 20160078965
- Publication date Mar 17, 2016
- QUALCOMM Incorporated
- Venugopal Boynapalli
- G11 - INFORMATION STORAGE
Information Patent Application
PSEUDO DUAL PORT MEMORY
- Publication number 20160055903
- Publication date Feb 25, 2016
- QUALCOMM Incorporated
- Sei Seung YOON
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH SPEED DEGLITCH SENSE AMPLIFIER
- Publication number 20150294697
- Publication date Oct 15, 2015
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY HAVING A PULL-UP CIRCUIT WITH INPUTS OF MULTIPLE VOLTAGE DOM...
- Publication number 20150279452
- Publication date Oct 1, 2015
- QUALCOMM Incorporated
- Sei Seung YOON
- G11 - INFORMATION STORAGE
Information Patent Application
EDGE-TRIGGERED PULSE LATCH
- Publication number 20150279451
- Publication date Oct 1, 2015
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR LOW-LEVEL INPUT SENSE AMPLIFICATION
- Publication number 20150269978
- Publication date Sep 24, 2015
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Application
LEVEL SHIFTERS FOR SYSTEMS WITH MULTIPLE VOLTAGE DOMAINS
- Publication number 20150228314
- Publication date Aug 13, 2015
- QUALCOMM Incorporated
- Xiaoliang BAI
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCED-AREA ARCHITECTURE FOR ASYMMETRIC INTERCONNECT
- Publication number 20150161067
- Publication date Jun 11, 2015
- QUALCOMM Incorporated
- Kevin Robert BOWLES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH FREQUENCY PSEUDO DUAL PORT MEMORY
- Publication number 20150109865
- Publication date Apr 23, 2015
- QUALCOMM Incorporated
- Chirag Gulati
- G11 - INFORMATION STORAGE
Information Patent Application
STATIC NAND CELL FOR TERNARY CONTENT ADDRESSABLE MEMORY (TCAM)
- Publication number 20150085554
- Publication date Mar 26, 2015
- QUALCOMM Incorporated
- Esin Terzioglu
- G11 - INFORMATION STORAGE
Information Patent Application
READ/WRITE ASSIST FOR MEMORIES
- Publication number 20150085568
- Publication date Mar 26, 2015
- QUALCOMM Incorporated
- Chirag GULATI
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ACCESS TIME TRACKING IN DUAL-RAIL SYSTEMS
- Publication number 20150067290
- Publication date Mar 5, 2015
- QUALCOMM Incorporated
- Ritu CHABA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY TIMING CIRCUIT
- Publication number 20150063046
- Publication date Mar 5, 2015
- QUALCOMM Incorporated
- Rakesh Kumar SINHA
- G11 - INFORMATION STORAGE
Information Patent Application
N-WELL SWITCHING CIRCUIT
- Publication number 20150043265
- Publication date Feb 12, 2015
- QUALCOMM Incorporated
- Gregory Ameriada Uvieghara
- G11 - INFORMATION STORAGE
Information Patent Application
MASK-PROGRAMMED READ ONLY MEMORY WITH ENHANCED SECURITY
- Publication number 20150029778
- Publication date Jan 29, 2015
- QUALCOMM Incorporated
- Sei Seung Yoon
- G11 - INFORMATION STORAGE
Information Patent Application
WIDE RANGE MULTIPORT BITCELL
- Publication number 20150029782
- Publication date Jan 29, 2015
- QUALCOMM Incorporated
- Changho Jung
- G11 - INFORMATION STORAGE
Information Patent Application
N-WELL SWITCHING CIRCUIT
- Publication number 20140369152
- Publication date Dec 18, 2014
- Esin Terzioglu
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR READING DATA FROM MULTI-BANK MEMORY CIRCUITS
- Publication number 20140321217
- Publication date Oct 30, 2014
- Hui Song
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR WRITING DATA TO MEMORY ARRAY CIRCUITS
- Publication number 20140269112
- Publication date Sep 18, 2014
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SEMICONDUCTOR APPARATUS FOR REDUCING POWER WHEN TRANSMIT...
- Publication number 20140266398
- Publication date Sep 18, 2014
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Application
WEAK KEEPER CIRCUIT FOR MEMORY DEVICE
- Publication number 20140226418
- Publication date Aug 14, 2014
- QUALCOMM Incorporated
- Balachander Ganesan
- G11 - INFORMATION STORAGE
Information Patent Application
N-WELL SWITCHING CIRCUIT
- Publication number 20140198588
- Publication date Jul 17, 2014
- QUALCOMM Incorporated
- Esin Terzioglu
- G11 - INFORMATION STORAGE

Sei Seung Yoon

Person

Patents Grantslast 30 patents

Memory repair enablement

Flexible power sequencing for dual-power memory

Systems and methods to provide security to one time program data

Voltage droop control

Flexible memory assistance scheme

High-speed level shifter

Lower power high speed decoding based dynamic tracking for memories

Timed sense amplifier circuits and methods in a semiconductor memory

High-speed word line decoder and level-shifter

Apparatus and method for latching data including AND-NOR or OR-NAND...

Voltage droop control

Efficient coding for memory redundancy

Scannable memories with robust clocking methodology to prevent inad...

Memory cell with improved write margin

Memory with a voltage-adjustment circuit to adjust the operating vo...

System and method for reducing programming voltage stress on memory...

Apparatus and method for writing data to memory array circuits

Mask-programmed read only memory with enhanced security

Write driver for memory

Sense amplifier with pulsed control for pull-up transistors

Pseudo dual port memory with dual latch flip-flop

Method and apparatus for low-level input sense amplification

N-well switching circuit

Write word-line assist circuitry for a byte-writeable memory

Apparatus and method for reading data from multi-bank memory circuits

Memory timing circuit

Weak keeper circuit for memory device

N-well switching circuit

Static NAND cell for ternary content addressable memory (TCAM)

Method and semiconductor apparatus for reducing power when transmit...

Patents Applicationslast 30 patents

MEMORY REPAIR ENABLEMENT

LOWER POWER HIGH SPEED DECODING BASED DYNAMIC TRACKING FOR MEMORIES

VOLTAGE DROOP CONTROL

Systems and Methods to Provide Security to One Time Program Data

TIMED SENSE AMPLIFIER CIRCUITS AND METHODS IN A SEMICONDUCTOR MEMORY

VOLTAGE DROOP CONTROL

HIGH-SPEED WORD LINE DECODER AND LEVEL-SHIFTER

EFFICIENT CODING FOR MEMORY REDUNDANCY

SCANNABLE MEMORIES WITH ROBUST CLOCKING METHODOLOGY TO PREVENT INAD...

PSEUDO DUAL PORT MEMORY

HIGH SPEED DEGLITCH SENSE AMPLIFIER

MEMORY HAVING A PULL-UP CIRCUIT WITH INPUTS OF MULTIPLE VOLTAGE DOM...

EDGE-TRIGGERED PULSE LATCH

METHOD AND APPARATUS FOR LOW-LEVEL INPUT SENSE AMPLIFICATION

LEVEL SHIFTERS FOR SYSTEMS WITH MULTIPLE VOLTAGE DOMAINS

REDUCED-AREA ARCHITECTURE FOR ASYMMETRIC INTERCONNECT

HIGH FREQUENCY PSEUDO DUAL PORT MEMORY

STATIC NAND CELL FOR TERNARY CONTENT ADDRESSABLE MEMORY (TCAM)

READ/WRITE ASSIST FOR MEMORIES

MEMORY ACCESS TIME TRACKING IN DUAL-RAIL SYSTEMS

MEMORY TIMING CIRCUIT

N-WELL SWITCHING CIRCUIT

MASK-PROGRAMMED READ ONLY MEMORY WITH ENHANCED SECURITY

WIDE RANGE MULTIPORT BITCELL

N-WELL SWITCHING CIRCUIT

APPARATUS AND METHOD FOR READING DATA FROM MULTI-BANK MEMORY CIRCUITS

APPARATUS AND METHOD FOR WRITING DATA TO MEMORY ARRAY CIRCUITS

METHOD AND SEMICONDUCTOR APPARATUS FOR REDUCING POWER WHEN TRANSMIT...

WEAK KEEPER CIRCUIT FOR MEMORY DEVICE

N-WELL SWITCHING CIRCUIT