Seiji Narui

Person

Sagamihara, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatuses, systems, and methods for counter-based read clock in s...
- Patent number 11,869,580
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Tomohiko Yamagishi
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses, systems, and methods for read clock timing alignment i...
- Patent number 11,854,601
- Issue date Dec 26, 2023
- Micron Technology, Inc.
- Kiyoshi Nakai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with first-in-first-out circuit
- Patent number 11,805,638
- Issue date Oct 31, 2023
- Seiji Narui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatuses for aligning read data in a stacked semicon...
- Patent number 11,763,855
- Issue date Sep 19, 2023
- Micron Technology, Inc.
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for semiconductor devices including clock s...
- Patent number 11,264,068
- Issue date Mar 1, 2022
- Micron Technology, Inc.
- Ryosuke Yatsushiro
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory core chip having TSVs
- Patent number 11,244,888
- Issue date Feb 8, 2022
- Micron Technology, Inc.
- Naohisa Nishioka
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatuses for aligning read data in a stacked semicon...
- Patent number 11,004,475
- Issue date May 11, 2021
- Micron Technology, Inc.
- Seiji Narui
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with first-in-first-out circuit
- Patent number 10,964,702
- Issue date Mar 30, 2021
- Micron Technology, Inc.
- Seiji Narui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device with write data bus control
- Patent number 10,943,625
- Issue date Mar 9, 2021
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Grant
High bandwidth memory having plural channels
- Patent number 10,943,622
- Issue date Mar 9, 2021
- Micron Technology, Inc.
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor layered device with data bus inversion
- Patent number 10,922,262
- Issue date Feb 16, 2021
- Micron Technology, Inc.
- Yuki Ebihara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory core chip having TSVS
- Patent number 10,916,489
- Issue date Feb 9, 2021
- Micron Technology, Inc.
- Naohisa Nishioka
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for semiconductor devices including clock s...
- Patent number 10,885,959
- Issue date Jan 5, 2021
- Micron Technology, Inc.
- Ryosuke Yatsushiro
- G11 - INFORMATION STORAGE
Information Patent Grant
High bandwidth memory having plural channels
- Patent number 10,777,232
- Issue date Sep 15, 2020
- Micron Technology, Inc.
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor layered device with data bus inversion
- Patent number 10,664,432
- Issue date May 26, 2020
- Micron Technology, Inc.
- Yuki Ebihara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor layered device with data bus inversion
- Patent number 10,614,024
- Issue date Apr 7, 2020
- Micron Technology, Inc.
- Yuki Ebihara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device with write data bus control
- Patent number 10,553,263
- Issue date Feb 4, 2020
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Grant
Stack access control for memory device
- Patent number 10,489,312
- Issue date Nov 26, 2019
- Micron Technology, Inc.
- Seiji Narui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stack access control for memory device
- Patent number 10,185,652
- Issue date Jan 22, 2019
- Micron Technology, Inc.
- Seiji Narui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for write data bus control in a stacked memory de...
- Patent number 10,163,469
- Issue date Dec 25, 2018
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device including spiral data path
- Patent number 9,472,253
- Issue date Oct 18, 2016
- Micron Technology, Inc.
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage device and system provided with same
- Patent number 9,412,432
- Issue date Aug 9, 2016
- PS4 Luxco S.A.R.L.
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device, method for controlling the same, and semicond...
- Patent number 9,355,705
- Issue date May 31, 2016
- PS4 Luxco S.A.R.L.
- Kiyohiro Furutani
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device having a complementary field effect transistor
- Patent number 9,081,402
- Issue date Jul 14, 2015
- PS4 Luxco S.A.R.L.
- Shinichi Miyatake
- G05 - CONTROLLING REGULATING
Information Patent Grant
Semiconductor device having ODT function
- Patent number 8,988,952
- Issue date Mar 24, 2015
- PS4 Luxco S.A.R.L.
- Atsushi Hiraishi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device, method for controlling the same, and semicond...
- Patent number 8,971,132
- Issue date Mar 3, 2015
- PS4 Luxco S.A.R.L.
- Kiyohiro Furutani
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device having input receiver circuit that operates in...
- Patent number 8,947,128
- Issue date Feb 3, 2015
- PS4 Luxco S.A.R.L.
- Chiaki Dono
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device having charge pump circuit and information pro...
- Patent number 8,902,691
- Issue date Dec 2, 2014
- PS4 Luxco S.A.R.L.
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device that performs refresh operation
- Patent number 8,885,432
- Issue date Nov 11, 2014
- PS4 Luxco S.A.R.L.
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device having hierarchically structured bit lines and...
- Patent number 8,773,884
- Issue date Jul 8, 2014
- Seiji Narui
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
LAYOUTS OF DATA PADS ON A SEMICONDUCTOR DIE
- Publication number 20230215828
- Publication date Jul 6, 2023
- Micron Technology, Inc.
- Andreas Kuesel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR COUNTER-BASED READ CLOCK IN S...
- Publication number 20230215494
- Publication date Jul 6, 2023
- Micron Technology, Inc.
- Tomohiko Yamagishi
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR READ CLOCK TIMING ALIGNMENT I...
- Publication number 20230206985
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Kiyoshi Nakai
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUSES FOR ALIGNING READ DATA IN A STACKED SEMICON...
- Publication number 20210264955
- Publication date Aug 26, 2021
- Micron Technology, Inc.
- Seiji Narui
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH FIRST-IN-FIRST-OUT CIRCUIT
- Publication number 20210225848
- Publication date Jul 22, 2021
- Micron Technology, Inc.
- Seiji Narui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Core Chip Having TSVS
- Publication number 20210183744
- Publication date Jun 17, 2021
- Micron Technology, Inc.
- Naohisa Nishioka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUSES AND METHODS FOR SEMICONDUCTOR DEVICES INCLUDING CLOCK S...
- Publication number 20210104269
- Publication date Apr 8, 2021
- Micron Technology, Inc.
- Ryosuke Yatsushiro
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High Bandwidth Memory Having Plural Channels
- Publication number 20200411062
- Publication date Dec 31, 2020
- Micron Technology, Inc.
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH BANDWIDTH MEMORY HAVING PLURAL CHANNELS
- Publication number 20200251148
- Publication date Aug 6, 2020
- Micron Technology, Inc.
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR LAYERED DEVICE WITH DATA BUS INVERSION
- Publication number 20200233828
- Publication date Jul 23, 2020
- Micron Technology, Inc.
- Yuki Ebihara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE WITH FIRST-IN-FIRST-OUT CIRCUIT
- Publication number 20200126993
- Publication date Apr 23, 2020
- Micron Technology, Inc.
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH WRITE DATA BUS CONTROL
- Publication number 20200126603
- Publication date Apr 23, 2020
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR LAYERED DEVICE WITH DATA BUS INVERSION
- Publication number 20190361835
- Publication date Nov 28, 2019
- Micron Technology, Inc.
- Yuki Ebihara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUSES FOR ALIGNING READ DATA IN A STACKED SEMICON...
- Publication number 20190304512
- Publication date Oct 3, 2019
- Micron Technology, Inc.
- Seiji Narui
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICE WITH WRITE DATA BUS CONTROL
- Publication number 20190122708
- Publication date Apr 25, 2019
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Application
STACK ACCESS CONTROL FOR MEMORY DEVICE
- Publication number 20180357156
- Publication date Dec 13, 2018
- Micron Technology, Inc.
- Seiji Narui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STACK ACCESS CONTROL FOR MEMORY DEVICE
- Publication number 20180341575
- Publication date Nov 29, 2018
- Micron Technology, Inc.
- Seiji Narui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WITH WRITE DATA BUS CONTROL
- Publication number 20180151207
- Publication date May 31, 2018
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR STORAGE DEVICE AND SYSTEM PROVIDED WITH SAME
- Publication number 20160042782
- Publication date Feb 11, 2016
- PS4 LUXCO S.A.R.L.
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING SPIRAL DATA PATH
- Publication number 20150213860
- Publication date Jul 30, 2015
- Micron Technology, Inc.
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE, METHOD FOR CONTROLLING THE SAME, AND SEMICOND...
- Publication number 20150131389
- Publication date May 14, 2015
- PS4 LUXCO S.A.R.L.
- Kiyohiro FURUTANI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE HAVING A COMPLEMENTARY FIELD EFFECT TRANSISTOR
- Publication number 20140300408
- Publication date Oct 9, 2014
- Shinichi Miyatake
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE THAT PERFORMS REFRESH OPERATION
- Publication number 20140177372
- Publication date Jun 26, 2014
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE HAVING HIERARCHICALLY STRUCTURED BIT LINES AND...
- Publication number 20140104919
- Publication date Apr 17, 2014
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE HAVING HIERARCHICALLY STRUCTURED BIT LINES AND...
- Publication number 20130301370
- Publication date Nov 14, 2013
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE HAVING HIERARCHICALLY STRUCTURED BIT LINES AND...
- Publication number 20130294135
- Publication date Nov 7, 2013
- Seiji Narui
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE, METHOD FOR CONTROLLING THE SAME, AND SEMICOND...
- Publication number 20130242674
- Publication date Sep 19, 2013
- Elpida Memory, Inc.
- Kiyohiro FURUTANI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE HAVING ODT FUNCTION
- Publication number 20130163353
- Publication date Jun 27, 2013
- Elpida Memory, Inc.
- Atsushi HIRAISHI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE HAVING INPUT RECEIVER CIRCUIT THAT OPERATES IN...
- Publication number 20130082761
- Publication date Apr 4, 2013
- Elpida Memory, Inc.
- Chiaki DONO
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE HAVING CHARGE PUMP CIRCUIT AND INFORMATION PRO...
- Publication number 20130070553
- Publication date Mar 21, 2013
- Elpida Menory, Inc.
- Seiji Narui
- G11 - INFORMATION STORAGE

Seiji Narui

Person

Patents Grantslast 30 patents

Apparatuses, systems, and methods for counter-based read clock in s...

Apparatuses, systems, and methods for read clock timing alignment i...

Semiconductor device with first-in-first-out circuit

Methods and apparatuses for aligning read data in a stacked semicon...

Apparatuses and methods for semiconductor devices including clock s...

Memory core chip having TSVs

Methods and apparatuses for aligning read data in a stacked semicon...

Semiconductor device with first-in-first-out circuit

Memory device with write data bus control

High bandwidth memory having plural channels

Semiconductor layered device with data bus inversion

Memory core chip having TSVS

Apparatuses and methods for semiconductor devices including clock s...

High bandwidth memory having plural channels

Semiconductor layered device with data bus inversion

Semiconductor layered device with data bus inversion

Memory device with write data bus control

Stack access control for memory device

Stack access control for memory device

System and method for write data bus control in a stacked memory de...

Semiconductor device including spiral data path

Semiconductor storage device and system provided with same

Semiconductor device, method for controlling the same, and semicond...

Semiconductor device having a complementary field effect transistor

Semiconductor device having ODT function

Semiconductor device, method for controlling the same, and semicond...

Semiconductor device having input receiver circuit that operates in...

Semiconductor device having charge pump circuit and information pro...

Semiconductor device that performs refresh operation

Semiconductor device having hierarchically structured bit lines and...

Patents Applicationslast 30 patents

LAYOUTS OF DATA PADS ON A SEMICONDUCTOR DIE

APPARATUSES, SYSTEMS, AND METHODS FOR COUNTER-BASED READ CLOCK IN S...

APPARATUSES, SYSTEMS, AND METHODS FOR READ CLOCK TIMING ALIGNMENT I...

METHODS AND APPARATUSES FOR ALIGNING READ DATA IN A STACKED SEMICON...

SEMICONDUCTOR DEVICE WITH FIRST-IN-FIRST-OUT CIRCUIT

Memory Core Chip Having TSVS

APPARATUSES AND METHODS FOR SEMICONDUCTOR DEVICES INCLUDING CLOCK S...

High Bandwidth Memory Having Plural Channels

HIGH BANDWIDTH MEMORY HAVING PLURAL CHANNELS

SEMICONDUCTOR LAYERED DEVICE WITH DATA BUS INVERSION

SEMICONDUCTOR DEVICE WITH FIRST-IN-FIRST-OUT CIRCUIT

MEMORY DEVICE WITH WRITE DATA BUS CONTROL

SEMICONDUCTOR LAYERED DEVICE WITH DATA BUS INVERSION

METHODS AND APPARATUSES FOR ALIGNING READ DATA IN A STACKED SEMICON...

MEMORY DEVICE WITH WRITE DATA BUS CONTROL

STACK ACCESS CONTROL FOR MEMORY DEVICE

STACK ACCESS CONTROL FOR MEMORY DEVICE

MEMORY DEVICE WITH WRITE DATA BUS CONTROL

SEMICONDUCTOR STORAGE DEVICE AND SYSTEM PROVIDED WITH SAME

SEMICONDUCTOR DEVICE INCLUDING SPIRAL DATA PATH

SEMICONDUCTOR DEVICE, METHOD FOR CONTROLLING THE SAME, AND SEMICOND...

SEMICONDUCTOR DEVICE HAVING A COMPLEMENTARY FIELD EFFECT TRANSISTOR

SEMICONDUCTOR DEVICE THAT PERFORMS REFRESH OPERATION

SEMICONDUCTOR DEVICE HAVING HIERARCHICALLY STRUCTURED BIT LINES AND...

SEMICONDUCTOR DEVICE HAVING HIERARCHICALLY STRUCTURED BIT LINES AND...

SEMICONDUCTOR DEVICE HAVING HIERARCHICALLY STRUCTURED BIT LINES AND...

SEMICONDUCTOR DEVICE, METHOD FOR CONTROLLING THE SAME, AND SEMICOND...

SEMICONDUCTOR DEVICE HAVING ODT FUNCTION

SEMICONDUCTOR DEVICE HAVING INPUT RECEIVER CIRCUIT THAT OPERATES IN...

SEMICONDUCTOR DEVICE HAVING CHARGE PUMP CIRCUIT AND INFORMATION PRO...