Seung Cheol Oh

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Test mode for a self-refreshed SRAM with DRAM memory cells
- Patent number 6,981,187
- Issue date Dec 27, 2005
- Nanoamp Solutions, Inc
- Seung Cheol Oh
- G11 - INFORMATION STORAGE
Information Patent Grant
DRAM with total self refresh and control circuit
- Patent number 6,741,515
- Issue date May 25, 2004
- NanoAmp Solutions, Inc.
- Paul S. Lazar
- G11 - INFORMATION STORAGE
Information Patent Grant
Power-up control circuit with a power-saving mode of operation
- Patent number 6,735,142
- Issue date May 11, 2004
- NanoAmp Solutions, Inc.
- Seung Cheol Oh
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage boosting circuit for a low power semiconductor memory
- Patent number 6,721,210
- Issue date Apr 13, 2004
- NanoAmp Solutions, Inc.
- Seung Cheol Oh
- G11 - INFORMATION STORAGE
Information Patent Grant
Asynchronous queuing circuit for DRAM external RAS accesses
- Patent number 6,643,216
- Issue date Nov 4, 2003
- NanoAmp Solutions, Inc.
- Paul S. Lazar
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
DRAM with total self refresh and control circuit
- Publication number 20030231540
- Publication date Dec 18, 2003
- Nanoamp Solutions, Inc.
- Paul S. Lazar
- G11 - INFORMATION STORAGE