Seungjoon Park

Person

Los Altos, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methodology and tools for tabled-based protocol specification and m...
- Patent number 8,443,337
- Issue date May 14, 2013
- Intel Corporation
- Ching-Tsun Chou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Optimizing concurrent accesses in a directory-based coherency protocol
- Patent number 8,190,820
- Issue date May 29, 2012
- Intel Corporation
- Hariharan Thantry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fairness mechanism for starvation prevention in directory-based cac...
- Patent number 8,099,558
- Issue date Jan 17, 2012
- SeungJoon Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for a 3-hop cache coherency protocol
- Patent number 7,836,144
- Issue date Nov 16, 2010
- Intel Corporation
- Phanindra K. Mannava
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
FAIRNESS MECHANISM FOR STARVATION PREVENTION IN DIRECTORY-BASED CAC...
- Publication number 20100250861
- Publication date Sep 30, 2010
- Seungjoon Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimizing concurrent accesses in a directory-based coherency protocol
- Publication number 20090313435
- Publication date Dec 17, 2009
- Hariharan Thantry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE CACHE ORGANIZATION FOR CHIP MULTIPROCESSORS
- Publication number 20090254712
- Publication date Oct 8, 2009
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methodology and tools for table-based protocol specification and mo...
- Publication number 20090235228
- Publication date Sep 17, 2009
- Ching-Tsun Chou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INTERCONNECT ARCHITECTURAL STATE COVERAGE MEASUREMENT METHODOLOGY
- Publication number 20090171647
- Publication date Jul 2, 2009
- Phanindra Mannava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for a 3-hop cache coherency protocol
- Publication number 20080162661
- Publication date Jul 3, 2008
- Intel Corporation
- Phanindra K. Mannava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Messaging protocol
- Publication number 20050262250
- Publication date Nov 24, 2005
- Brannon J. Batson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache coherence protocol
- Publication number 20050240734
- Publication date Oct 27, 2005
- Brannon J. Batson
- G06 - COMPUTING CALCULATING COUNTING

Seungjoon Park

Person

Patents Grantslast 30 patents

Methodology and tools for tabled-based protocol specification and m...

Optimizing concurrent accesses in a directory-based coherency protocol

Fairness mechanism for starvation prevention in directory-based cac...

System and method for a 3-hop cache coherency protocol

Patents Applicationslast 30 patents

FAIRNESS MECHANISM FOR STARVATION PREVENTION IN DIRECTORY-BASED CAC...

Optimizing concurrent accesses in a directory-based coherency protocol

ADAPTIVE CACHE ORGANIZATION FOR CHIP MULTIPROCESSORS

Methodology and tools for table-based protocol specification and mo...

INTERCONNECT ARCHITECTURAL STATE COVERAGE MEASUREMENT METHODOLOGY

System and method for a 3-hop cache coherency protocol

Messaging protocol

Cache coherence protocol