Shahin Toutounchi

Person

Pleasanton, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Manufacturing test for a programmable integrated circuit implementi...
- Patent number 8,311,762
- Issue date Nov 13, 2012
- Xilinx, Inc.
- Ismed D. Hartanto
- G01 - MEASURING TESTING
Information Patent Grant
Non-volatile memory cell with charge storage element and method of...
- Patent number 7,947,980
- Issue date May 24, 2011
- Xilinx, Inc.
- Shahin Toutounchi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Testing an embedded core
- Patent number 7,917,820
- Issue date Mar 29, 2011
- Xilinx, Inc.
- Adarsh Pavle
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit for and method of testing for faults in a programmable logi...
- Patent number 7,761,755
- Issue date Jul 20, 2010
- Xilinx, Inc.
- Tassanee Payakapan
- G01 - MEASURING TESTING
Information Patent Grant
Testing of a programmable device
- Patent number 7,725,787
- Issue date May 25, 2010
- Xilinx, Inc.
- Robert W. Wells
- G01 - MEASURING TESTING
Information Patent Grant
Three-terminal non-volatile memory element with hybrid gate dielectric
- Patent number 7,687,797
- Issue date Mar 30, 2010
- Xilinx, Inc.
- James Karp
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory cell with charge storage element and method of...
- Patent number 7,544,968
- Issue date Jun 9, 2009
- Xilinx, Inc.
- Shahin Toutounchi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single event upset in SRAM cells in FPGAs with high resistivity gat...
- Patent number 7,452,765
- Issue date Nov 18, 2008
- Xilinx, Inc.
- Martin L. Voogel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Testing of a programmable device
- Patent number 7,454,675
- Issue date Nov 18, 2008
- Xilinx, Inc.
- Robert W. Wells
- G01 - MEASURING TESTING
Information Patent Grant
PMOS three-terminal non-volatile memory element and method of progr...
- Patent number 7,450,431
- Issue date Nov 11, 2008
- Xilinx, Inc.
- James Karp
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of programming a three-terminal non-volatile memory element...
- Patent number 7,420,842
- Issue date Sep 2, 2008
- Xilinx, Inc.
- Michael G. Ahrens
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self test (BIST) technology for testing field programmable...
- Patent number 7,302,625
- Issue date Nov 27, 2007
- Xilinx, Inc.
- Tassanee Payakapan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automated fault diagnosis in a programmable device
- Patent number 7,219,287
- Issue date May 15, 2007
- Xilinx, Inc.
- Shahin Toutounchi
- G01 - MEASURING TESTING
Information Patent Grant
Single event upset in SRAM cells in FPGAs with high resistivity gat...
- Patent number 6,982,451
- Issue date Jan 3, 2006
- Xilinx, Inc.
- Martin L. Voogel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of testing for shorts in programmable logic devices using r...
- Patent number 6,920,621
- Issue date Jul 19, 2005
- Xilinx, Inc.
- Shahin Toutounchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Application-specific testing methods for programmable logic devices
- Patent number 6,891,395
- Issue date May 10, 2005
- Xilinx, Inc.
- Robert W. Wells
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Application-specific testing methods for programmable logic devices
- Patent number 6,817,006
- Issue date Nov 9, 2004
- Xilinx, Inc.
- Robert W. Wells
- G01 - MEASURING TESTING
Information Patent Grant
Method for locating faults in a programmable logic device
- Patent number 6,732,348
- Issue date May 4, 2004
- Xilinx, Inc.
- Mehdi Baradaran Tahoori
- G01 - MEASURING TESTING
Information Patent Grant
Method for testing faults in a programmable logic device
- Patent number 6,732,309
- Issue date May 4, 2004
- Xilinx, Inc.
- Shahin Toutounchi
- G01 - MEASURING TESTING
Information Patent Grant
Method of forming a zener diode
- Patent number 6,645,802
- Issue date Nov 11, 2003
- Xilinx, Inc.
- Sheau-Suey Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fault emulation testing of programmable logic devices
- Patent number 6,594,610
- Issue date Jul 15, 2003
- Xilinx, Inc.
- Shahin Toutounchi
- G01 - MEASURING TESTING
Information Patent Grant
Non-volatile memory array using gate breakdown structures
- Patent number 6,549,458
- Issue date Apr 15, 2003
- Xilinx, Inc.
- Kameswara K. Rao
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory array using gate breakdown structures
- Patent number 6,522,582
- Issue date Feb 18, 2003
- Xilinx, Inc.
- Kameswara K. Rao
- G11 - INFORMATION STORAGE
Information Patent Grant
Electrostatic-discharge protection circuit
- Patent number 6,268,639
- Issue date Jul 31, 2001
- Xilinx, Inc.
- Sheau-Suey Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three terminal non-volatile memory element
- Patent number 6,266,269
- Issue date Jul 24, 2001
- Xilinx, Inc.
- James Karp
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory array using gate breakdown structure in standar...
- Patent number 6,044,012
- Issue date Mar 28, 2000
- Xilinx, Inc.
- Kameswara K. Rao
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of forming an MOS-type integrated circuit structure with a d...
- Patent number 5,661,069
- Issue date Aug 26, 1997
- LSI Logic Corporation
- Alexander H. Owens
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit structure including CMOS devices protected by pa...
- Patent number 5,561,319
- Issue date Oct 1, 1996
- LSI Logic Corporation
- Alexander H. Owens
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High-temperature bias anneal of integrated circuits for improved ra...
- Patent number 5,516,731
- Issue date May 14, 1996
- LSI Logic Corporation
- Shahin Toutounchi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Radiation hardened CMOS structure using an implanted P guard struct...
- Patent number 5,220,192
- Issue date Jun 15, 1993
- LSI Logic
- Alexander H. Owens
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Application-specific testing methods for programmable logic devices
- Publication number 20040216081
- Publication date Oct 28, 2004
- Xilinx, Inc.
- Robert W. Wells
- G06 - COMPUTING CALCULATING COUNTING

Shahin Toutounchi

Person

Patents Grantslast 30 patents

Manufacturing test for a programmable integrated circuit implementi...

Non-volatile memory cell with charge storage element and method of...

Testing an embedded core

Circuit for and method of testing for faults in a programmable logi...

Testing of a programmable device

Three-terminal non-volatile memory element with hybrid gate dielectric

Non-volatile memory cell with charge storage element and method of...

Single event upset in SRAM cells in FPGAs with high resistivity gat...

Testing of a programmable device

PMOS three-terminal non-volatile memory element and method of progr...

Method of programming a three-terminal non-volatile memory element...

Built-in self test (BIST) technology for testing field programmable...

Automated fault diagnosis in a programmable device

Single event upset in SRAM cells in FPGAs with high resistivity gat...

Methods of testing for shorts in programmable logic devices using r...

Application-specific testing methods for programmable logic devices

Application-specific testing methods for programmable logic devices

Method for locating faults in a programmable logic device

Method for testing faults in a programmable logic device

Method of forming a zener diode

Fault emulation testing of programmable logic devices

Non-volatile memory array using gate breakdown structures

Non-volatile memory array using gate breakdown structures

Electrostatic-discharge protection circuit

Three terminal non-volatile memory element

Non-volatile memory array using gate breakdown structure in standar...

Method of forming an MOS-type integrated circuit structure with a d...

Integrated circuit structure including CMOS devices protected by pa...

High-temperature bias anneal of integrated circuits for improved ra...

Radiation hardened CMOS structure using an implanted P guard struct...

Patents Applicationslast 30 patents

Application-specific testing methods for programmable logic devices