Shankar Krithivasan

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Processor and method of determining a normalization count
- Patent number 8,631,056
- Issue date Jan 14, 2014
- QUALCOMM Incorporated
- Shankar Krithivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method to execute a linear feedback-shift instruction
- Patent number 8,281,111
- Issue date Oct 2, 2012
- QUALCOMM Incorporated
- Erich Plondke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method to perform fast rotation operations
- Patent number 8,243,100
- Issue date Aug 14, 2012
- QUALCOMM Incorporated
- Shankar Krithivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of performing two's complement operations in a di...
- Patent number 8,234,319
- Issue date Jul 31, 2012
- QUALCOMM Incorporated
- Shankar Krithivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of selectively accessing a register file
- Patent number 7,979,681
- Issue date Jul 12, 2011
- QUALCOMM Incorporated
- Suresh K. Venkumahanti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of determining an address of an element within a...
- Patent number 7,877,571
- Issue date Jan 25, 2011
- Qualcomm, Incorporated
- Shankar Krithivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Booth multiplier with enhanced reduction tree circuitry
- Patent number 7,809,783
- Issue date Oct 5, 2010
- QUALCOMM Incorporated
- Shankar Krithivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power-efficient sign extension for booth multiplication methods and...
- Patent number 7,797,366
- Issue date Sep 14, 2010
- QUALCOMM Incorporated
- Shankar Krithivasan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
System and Method to Execute a Linear Feedback-Shift Instruction
- Publication number 20100077187
- Publication date Mar 25, 2010
- QUALCOMM Incorporated
- Erich Plondke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method to Perform Fast Rotation Operations
- Publication number 20090327667
- Publication date Dec 31, 2009
- QUALCOMM Incorporated
- Shankar Krithivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor and Method of Determining a Normalization Count
- Publication number 20090177724
- Publication date Jul 9, 2009
- QUALCOMM Incorporated
- Shankar Krithivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method of Selectively Accessing a Register File
- Publication number 20090132793
- Publication date May 21, 2009
- QUALCOMM Incorporated
- Suresh K. Venkumahanti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method of Determining an Address of an Element Within a...
- Publication number 20090132783
- Publication date May 21, 2009
- QUALCOMM Incorporated
- Shankar Krithivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Booth multiplier with enhanced reduction tree circuitry
- Publication number 20070192398
- Publication date Aug 16, 2007
- Shankar Krithivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power-efficient sign extension for booth multiplication methods and...
- Publication number 20070192399
- Publication date Aug 16, 2007
- Shankar Krithivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method of performing two's complement operations in a di...
- Publication number 20060282238
- Publication date Dec 14, 2006
- Shankar Krithivasan
- G06 - COMPUTING CALCULATING COUNTING

Shankar Krithivasan

Person

Patents Grantslast 30 patents

Processor and method of determining a normalization count

System and method to execute a linear feedback-shift instruction

System and method to perform fast rotation operations

System and method of performing two's complement operations in a di...

System and method of selectively accessing a register file

System and method of determining an address of an element within a...

Booth multiplier with enhanced reduction tree circuitry

Power-efficient sign extension for booth multiplication methods and...

Patents Applicationslast 30 patents

System and Method to Execute a Linear Feedback-Shift Instruction

System and Method to Perform Fast Rotation Operations

Processor and Method of Determining a Normalization Count

System and Method of Selectively Accessing a Register File

System and Method of Determining an Address of an Element Within a...

Booth multiplier with enhanced reduction tree circuitry

Power-efficient sign extension for booth multiplication methods and...

System and method of performing two's complement operations in a di...