Sheila Marie L. Alvarez

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and method of forming wire studs as vertical i...
- Patent number 10,446,523
- Issue date Oct 15, 2019
- STATS ChipPAC Pte. Ltd.
- Pandi C. Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with photoimagable dielectric-d...
- Patent number 9,679,769
- Issue date Jun 13, 2017
- STATS ChipPAC Pte. Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with support structure and meth...
- Patent number 9,502,267
- Issue date Nov 22, 2016
- STATS ChipPAC Pte. Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having wire studs as vertical interconnect in...
- Patent number 9,443,797
- Issue date Sep 13, 2016
- STATS ChipPAC Pte. Ltd.
- Pandi C. Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with photoimagable dielectric-d...
- Patent number 9,406,531
- Issue date Aug 2, 2016
- STATS ChipPAC Pte. Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with insulated trace and method...
- Patent number 9,406,642
- Issue date Aug 2, 2016
- Stats Chippac Ltd.
- HeeJo Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with pre-molded leadframe and m...
- Patent number 9,331,003
- Issue date May 3, 2016
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming RDL and vertical interco...
- Patent number 9,330,994
- Issue date May 3, 2016
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor flip chip package having substantially non-collapsibl...
- Patent number 8,405,230
- Issue date Mar 26, 2013
- Stats Chippac Ltd.
- Jae Soo Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor flip chip package having substantially non-collapsibl...
- Patent number 7,880,313
- Issue date Feb 1, 2011
- ChipPAC, Inc.
- Jae Soo Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of laser-marking wafers with tape a...
- Patent number 7,829,384
- Issue date Nov 9, 2010
- STATS ChipPAC, Ltd.
- Glenn Omandam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cost effective substrate fabrication for flip-chip packages
- Patent number 6,802,445
- Issue date Oct 12, 2004
- ST Assembly Test Services PTE LTD
- Il Kwon Shim
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Heat spreaders, heat spreader packages, and fabrication methods for...
- Patent number 6,775,140
- Issue date Aug 10, 2004
- ST Assembly Test Services Ltd.
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Device and Method of Forming Wire Studs as Vertical I...
- Publication number 20160336299
- Publication date Nov 17, 2016
- STATS ChipPAC Pte Ltd.
- Pandi C. Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming RDL and Vertical Interco...
- Publication number 20150279778
- Publication date Oct 1, 2015
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE INK AND METHOD...
- Publication number 20150179602
- Publication date Jun 25, 2015
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Wire Studs as Vertical I...
- Publication number 20140077364
- Publication date Mar 20, 2014
- STATS ChipPAC, Ltd.
- Pandi C. Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Laser-Marking Wafers with Tape A...
- Publication number 20090081830
- Publication date Mar 26, 2009
- STATS ChipPAC, Ltd.
- Glenn Omandam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ETCHED LEADFRAME FLIPCHIP PACKAGE SYSTEM
- Publication number 20070241432
- Publication date Oct 18, 2007
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DOWNSET LEAD
- Publication number 20070108624
- Publication date May 17, 2007
- STATS ChipPAC Ltd.
- Jeffrey D. Punzalan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE WITH CONTROLLED SOLDER BUMP WETTING
- Publication number 20070090537
- Publication date Apr 26, 2007
- STATS ChipPAC Ltd.
- IL Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor package with selective underfill and fabrication meth...
- Publication number 20060252177
- Publication date Nov 9, 2006
- STATS ChipPAC Ltd.
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE WITH CONTROLLED SOLDER BUMP WETTING AND FABRI...
- Publication number 20060246629
- Publication date Nov 2, 2006
- STATS ChipPAC Ltd.
- IL Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor package flip chip interconnect having spacer
- Publication number 20060192295
- Publication date Aug 31, 2006
- ChipPAC, Inc.
- Jae Soo Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor package heat spreaders and fabrication methods therefor
- Publication number 20050112796
- Publication date May 26, 2005
- Virgil Cotoco Ararao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Cost effective substrate fabrication for flip-chip packages
- Publication number 20040079788
- Publication date Apr 29, 2004
- ST ASSEMBLY TEST SERVICES PTE LTD
- Il Kwon Shim
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR

Sheila Marie L. Alvarez

Person

Patents Grantslast 30 patents

Semiconductor device and method of forming wire studs as vertical i...

Integrated circuit packaging system with photoimagable dielectric-d...

Integrated circuit packaging system with support structure and meth...

Semiconductor device having wire studs as vertical interconnect in...

Integrated circuit packaging system with photoimagable dielectric-d...

Integrated circuit packaging system with insulated trace and method...

Integrated circuit packaging system with pre-molded leadframe and m...

Semiconductor device and method of forming RDL and vertical interco...

Semiconductor flip chip package having substantially non-collapsibl...

Semiconductor flip chip package having substantially non-collapsibl...

Semiconductor device and method of laser-marking wafers with tape a...

Cost effective substrate fabrication for flip-chip packages

Heat spreaders, heat spreader packages, and fabrication methods for...

Patents Applicationslast 30 patents

Semiconductor Device and Method of Forming Wire Studs as Vertical I...

Semiconductor Device and Method of Forming RDL and Vertical Interco...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE INK AND METHOD...

Semiconductor Device and Method of Forming Wire Studs as Vertical I...

Semiconductor Device and Method of Laser-Marking Wafers with Tape A...

ETCHED LEADFRAME FLIPCHIP PACKAGE SYSTEM

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DOWNSET LEAD

SEMICONDUCTOR PACKAGE WITH CONTROLLED SOLDER BUMP WETTING

Semiconductor package with selective underfill and fabrication meth...

SEMICONDUCTOR PACKAGE WITH CONTROLLED SOLDER BUMP WETTING AND FABRI...

Semiconductor package flip chip interconnect having spacer

Semiconductor package heat spreaders and fabrication methods therefor

Cost effective substrate fabrication for flip-chip packages