Sheila Rima C. Magno

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit package system with filled wafer recess
- Patent number 8,293,584
- Issue date Oct 23, 2012
- Stats Chippac Ltd.
- Dennis Guillermo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with etched ring and die paddle...
- Patent number 7,863,108
- Issue date Jan 4, 2011
- Stats Chippac Ltd.
- Antonio B. Dimaano, Jr.
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method of fabricating an integrated circuit with etched ring and di...
- Patent number 7,556,987
- Issue date Jul 7, 2009
- Stats Chippac Ltd.
- Antonio B. Dimaano, Jr.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wire sweep resistant semiconductor package and manufacturing method...
- Patent number 7,541,222
- Issue date Jun 2, 2009
- Stats Chippac Ltd.
- Sheila Rima C. Magno
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with controlled solder bump wetting
- Patent number 7,352,055
- Issue date Apr 1, 2008
- Stats Chippac Ltd.
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with controlled solder bump wetting and fabri...
- Patent number 7,148,086
- Issue date Dec 12, 2006
- Stats Chippac Ltd.
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Air pocket resistant semiconductor package
- Patent number 7,141,886
- Issue date Nov 28, 2006
- Stats Chippac Ltd.
- Antonio B. Dimaano Jr.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Air pocket resistant semiconductor package system
- Patent number 6,969,640
- Issue date Nov 29, 2005
- Stats Chippac Ltd.
- Antonio B. Dimaano Jr.
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ETCHED RING AND DIE PADDLE...
- Publication number 20090230529
- Publication date Sep 17, 2009
- Antonio B. Dimaano, JR.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FILLED RECESS
- Publication number 20080029847
- Publication date Feb 7, 2008
- STATS ChipPAC Ltd.
- Dennis Guillermo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM
- Publication number 20080001263
- Publication date Jan 3, 2008
- STATS ChipPAC Ltd.
- Antonio B. Dimaano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTI-SURFACE DIE ATTACH PAD
- Publication number 20070075404
- Publication date Apr 5, 2007
- STATS ChipPAC Ltd.
- Antonio B. Dimaano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIRE SWEEP RESISTANT SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD...
- Publication number 20070063354
- Publication date Mar 22, 2007
- STATS ChipPAC Ltd.
- Sheila Rima C. Magno
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Air pocket resistant semiconductor package
- Publication number 20060043564
- Publication date Mar 2, 2006
- STATS ChipPAC Ltd.
- Antonio B. Dimaano
- H01 - BASIC ELECTRIC ELEMENTS

Sheila Rima C. Magno

Person

Patents Grantslast 30 patents

Integrated circuit package system with filled wafer recess

Integrated circuit packaging system with etched ring and die paddle...

Method of fabricating an integrated circuit with etched ring and di...

Wire sweep resistant semiconductor package and manufacturing method...

Semiconductor package with controlled solder bump wetting

Semiconductor package with controlled solder bump wetting and fabri...

Air pocket resistant semiconductor package

Air pocket resistant semiconductor package system

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ETCHED RING AND DIE PADDLE...

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FILLED RECESS

INTEGRATED CIRCUIT PACKAGE SYSTEM

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTI-SURFACE DIE ATTACH PAD

WIRE SWEEP RESISTANT SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD...

Air pocket resistant semiconductor package