Sheldon B. Levenstein

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Microprocessor that fuses load and compare instructions
- Patent number 11,748,104
- Issue date Sep 5, 2023
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sharing instruction cache lines between multiple threads
- Patent number 11,593,109
- Issue date Feb 28, 2023
- International Business Machines Corporation
- Sheldon Bernard Levenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sharing instruction cache footprint between multiple threads
- Patent number 11,593,108
- Issue date Feb 28, 2023
- International Business Machines Corporation
- Sheldon Bernard Levenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Program counter (PC)-relative load and store addressing for fused i...
- Patent number 11,392,386
- Issue date Jul 19, 2022
- International Business Machines Corporation
- Nicholas R. Orzol
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling and fusing load instructions in a processor
- Patent number 11,249,757
- Issue date Feb 15, 2022
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fusion to enhance early address generation of load instructions in...
- Patent number 11,163,571
- Issue date Nov 2, 2021
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selectively supporting static branch prediction settings only in as...
- Patent number 11,163,577
- Issue date Nov 2, 2021
- International Business Machines Corporation
- Sheldon Levenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Program instruction scheduling
- Patent number 10,983,797
- Issue date Apr 20, 2021
- International Business Machines Corporation
- Christian Zoellin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction prefetching in a computer processor using a prefetch pr...
- Patent number 10,664,279
- Issue date May 26, 2020
- International Business Machines Corporation
- Richard J. Eickemeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing content addressable memory and random access memory
- Patent number 10,593,420
- Issue date Mar 17, 2020
- International Business Machines Corporation
- Harry Barowski
- G11 - INFORMATION STORAGE
Information Patent Grant
Blocking instruction fetching in a computer processor
- Patent number 10,528,352
- Issue date Jan 7, 2020
- International Business Machines Corporation
- Bryan G. Hickerson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic sequential instruction prefetching
- Patent number 10,379,857
- Issue date Aug 13, 2019
- International Business Machines Corporation
- Richard J. Eickemeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction prefetching in a computer processor using a prefetch pr...
- Patent number 10,175,987
- Issue date Jan 8, 2019
- International Business Machines Corporation
- Richard J. Eickemeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing content addressable memory and random access memory
- Patent number 10,170,199
- Issue date Jan 1, 2019
- International Business Machines Corporation
- Harry Barowski
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing content addressable memory and random access memory
- Patent number 10,079,070
- Issue date Sep 18, 2018
- International Business Machines Corporation
- Harry Barowski
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for dynamic sequential instruction prefetching
- Patent number 10,078,514
- Issue date Sep 18, 2018
- International Business Machines Corporation
- Richard J. Eickemeyer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Controlling power of a cache based on predicting the instruction ca...
- Patent number 8,635,408
- Issue date Jan 21, 2014
- International Business Machines Corporation
- Sheldon B. Levenstein
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method for detecting address match in a deeply pipelined processor...
- Patent number 8,549,235
- Issue date Oct 1, 2013
- International Business Machines Corporation
- Miles Robert Dooley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch target address cache with hashed indices
- Patent number 7,962,722
- Issue date Jun 14, 2011
- International Business Machines Corporation
- Sheldon B. Levenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for tracking changes in L1 data cache directory
- Patent number 7,831,775
- Issue date Nov 9, 2010
- International Business Machines Corporation
- Sheldon B. Levenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for generating effective address
- Patent number 7,809,924
- Issue date Oct 5, 2010
- International Business Machines Corporation
- Rachel Marie Flood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for efficiently accessing both aligned and una...
- Patent number 7,788,450
- Issue date Aug 31, 2010
- International Business Machines Corporation
- Eric Jason Fluhr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to optimize effective page number to real page number transl...
- Patent number 7,660,965
- Issue date Feb 9, 2010
- International Business Machines Corporation
- Joaquin Hinojosa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus and program product for enhancing performance of...
- Patent number 7,603,543
- Issue date Oct 13, 2009
- International Business Machines Corporation
- Miles Robert Dooley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism in a multi-threaded microprocessor to maintain best case...
- Patent number 7,571,283
- Issue date Aug 4, 2009
- International Business Machines Corporation
- Scott B. Frommer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for tracking changes in L1 data cache directory
- Patent number 7,401,186
- Issue date Jul 15, 2008
- International Business Machines Corporation
- Sheldon B. Levenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism in a multi-threaded microprocessor to maintain best case...
- Patent number 7,380,062
- Issue date May 27, 2008
- International Business Machines Corporation
- Scott Bruce Frommer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for generating effective address
- Patent number 7,360,058
- Issue date Apr 15, 2008
- International Business Machines Corporation
- Rachel Marie Flood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to optimize effective page number to real page number transl...
- Patent number 7,350,051
- Issue date Mar 25, 2008
- International Business Machines Corporation
- Joaquin Hinojosa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and computer program product for sharing data in...
- Patent number 7,318,127
- Issue date Jan 8, 2008
- International Business Machines Corporation
- David Allen Hrusecky
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SIDEBAND INSTRUCTION ADDRESS TRANSLATION
- Publication number 20240202127
- Publication date Jun 20, 2024
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARING INSTRUCTION CACHE FOOTPRINT BETWEEN MULITPLE THREADS
- Publication number 20220391207
- Publication date Dec 8, 2022
- International Business Machines Corporation
- Sheldon Bernard Levenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARING INSTRUCTION CACHE LINES BETWEEN MULITPLE THREADS
- Publication number 20220391208
- Publication date Dec 8, 2022
- International Business Machines Corporation
- Sheldon Bernard Levenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAM COUNTER (PC)-RELATIVE LOAD AND STORE ADDRESSING
- Publication number 20220050684
- Publication date Feb 17, 2022
- International Business Machines Corporation
- Nicholas R. Orzol
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HANDLING AND FUSING LOAD INSTRUCTIONS IN A PROCESSOR
- Publication number 20220050679
- Publication date Feb 17, 2022
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICROPROCESSOR THAT FUSES LOAD AND COMPARE INSTRUCTIONS
- Publication number 20220035634
- Publication date Feb 3, 2022
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FUSION OF MICROPROCESSOR STORE INSTRUCTIONS
- Publication number 20220019436
- Publication date Jan 20, 2022
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAM INSTRUCTION SCHEDULING
- Publication number 20200379766
- Publication date Dec 3, 2020
- International Business Machines Corporation
- Christian Zoellin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVELY SUPPORTING STATIC BRANCH PREDICTION SETTINGS ONLY IN AS...
- Publication number 20200167163
- Publication date May 28, 2020
- International Business Machines Corporation
- Sheldon Levenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION PREFETCHING IN A COMPUTER PROCESSOR USING A PREFETCH PR...
- Publication number 20190138312
- Publication date May 9, 2019
- International Business Machines Corporation
- RICHARD J. EICKEMEYER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC SEQUENTIAL INSTRUCTION PREFETCHING
- Publication number 20180365012
- Publication date Dec 20, 2018
- International Business Machines Corporation
- RICHARD J. EICKEMEYER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TESTING CONTENT ADDRESSABLE MEMORY AND RANDOM ACCESS MEMORY
- Publication number 20180174666
- Publication date Jun 21, 2018
- International Business Machines Corporation
- Harry Barowski
- G11 - INFORMATION STORAGE
Information Patent Application
TESTING CONTENT ADDRESSABLE MEMORY AND RANDOM ACCESS MEMORY
- Publication number 20180151248
- Publication date May 31, 2018
- International Business Machines Corporation
- Harry Barowski
- G11 - INFORMATION STORAGE
Information Patent Application
TESTING CONTENT ADDRESSABLE MEMORY AND RANDOM ACCESS MEMORY
- Publication number 20180114585
- Publication date Apr 26, 2018
- International Business Machines Corporation
- Harry Barowski
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR DYNAMIC SEQUENTIAL INSTRUCTION PREFETCHING
- Publication number 20170329608
- Publication date Nov 16, 2017
- International Business Machines Corporation
- RICHARD J. EICKEMEYER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION PREFETCHING IN A COMPUTER PROCESSOR
- Publication number 20170269937
- Publication date Sep 21, 2017
- International Business Machines Corporation
- RICHARD J. EICKEMEYER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCKING INSTRUCTION FETCHING IN A COMPUTER PROCESSOR
- Publication number 20170262286
- Publication date Sep 14, 2017
- International Business Machines Corporation
- BRYAN G. HICKERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Detecting Address Match in a Deeply Pipelined Processor...
- Publication number 20120297162
- Publication date Nov 22, 2012
- International Business Machines Corporation
- Miles Robert Dooley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Predicting the Instruction Cache Way for High Power Applications
- Publication number 20120173821
- Publication date Jul 5, 2012
- International Business Machines Corporation
- Sheldon B. Levenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING SYSTEM, PROCESSOR AND METHOD OF DATA PROCESSING HAV...
- Publication number 20090198985
- Publication date Aug 6, 2009
- SHELDON B. LEVENSTEIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Tracking Changes in L1 Data Cache Directory
- Publication number 20080263283
- Publication date Oct 23, 2008
- International Business Machines Corporation
- Sheldon B. Levenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanism in a Multi-Threaded Microprocessor to Maintain Best Case...
- Publication number 20080209177
- Publication date Aug 28, 2008
- International Business Machines Corporation
- Scott Bruce Frommer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM FOR GENERATING EFFECTIVE ADDRESS
- Publication number 20080162887
- Publication date Jul 3, 2008
- RACHEL MARIE FLOOD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD TO OPTIMIZE EFFECTIVE PAGE NUMBER TO REAL PAGE NUMBER TRANSL...
- Publication number 20080104599
- Publication date May 1, 2008
- Joaquin Hinojosa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR EFFICIENTLY ACCESSING BOTH ALIGNED AND UNA...
- Publication number 20080010433
- Publication date Jan 10, 2008
- Eric Jason Fluhr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Lookahead mode sequencer
- Publication number 20060184772
- Publication date Aug 17, 2006
- International Business Machines Corporation
- Miles Robert Dooley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for efficiently accessing both aligned and una...
- Publication number 20060184734
- Publication date Aug 17, 2006
- International Business Machines Corporation
- Eric Jason Fluhr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanism in a multi-threaded microprocessor to maintain best case...
- Publication number 20060184739
- Publication date Aug 17, 2006
- International Business Machines Corporation
- Scott Bruce Frommer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mini-refresh processor recovery as bug workaround method using exis...
- Publication number 20060184771
- Publication date Aug 17, 2006
- International Business Machines
- Michael Stephen Floyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and computer program product for sharing data in...
- Publication number 20060184741
- Publication date Aug 17, 2006
- International Business Machines Corporation
- David Allen Hrusecky
- G06 - COMPUTING CALCULATING COUNTING

Sheldon B. Levenstein

Person

Patents Grantslast 30 patents

Microprocessor that fuses load and compare instructions

Sharing instruction cache lines between multiple threads

Sharing instruction cache footprint between multiple threads

Program counter (PC)-relative load and store addressing for fused i...

Handling and fusing load instructions in a processor

Fusion to enhance early address generation of load instructions in...

Selectively supporting static branch prediction settings only in as...

Program instruction scheduling

Instruction prefetching in a computer processor using a prefetch pr...

Testing content addressable memory and random access memory

Blocking instruction fetching in a computer processor

Dynamic sequential instruction prefetching

Instruction prefetching in a computer processor using a prefetch pr...

Testing content addressable memory and random access memory

Testing content addressable memory and random access memory

Techniques for dynamic sequential instruction prefetching

Controlling power of a cache based on predicting the instruction ca...

Method for detecting address match in a deeply pipelined processor...

Branch target address cache with hashed indices

System and method for tracking changes in L1 data cache directory

System for generating effective address

Method and apparatus for efficiently accessing both aligned and una...

Method to optimize effective page number to real page number transl...

Method, apparatus and program product for enhancing performance of...

Mechanism in a multi-threaded microprocessor to maintain best case...

System and method for tracking changes in L1 data cache directory

Mechanism in a multi-threaded microprocessor to maintain best case...

System and method for generating effective address

Method to optimize effective page number to real page number transl...

Method, apparatus, and computer program product for sharing data in...

Patents Applicationslast 30 patents

SIDEBAND INSTRUCTION ADDRESS TRANSLATION

SHARING INSTRUCTION CACHE FOOTPRINT BETWEEN MULITPLE THREADS

SHARING INSTRUCTION CACHE LINES BETWEEN MULITPLE THREADS

PROGRAM COUNTER (PC)-RELATIVE LOAD AND STORE ADDRESSING

HANDLING AND FUSING LOAD INSTRUCTIONS IN A PROCESSOR

MICROPROCESSOR THAT FUSES LOAD AND COMPARE INSTRUCTIONS

FUSION OF MICROPROCESSOR STORE INSTRUCTIONS

PROGRAM INSTRUCTION SCHEDULING

SELECTIVELY SUPPORTING STATIC BRANCH PREDICTION SETTINGS ONLY IN AS...

INSTRUCTION PREFETCHING IN A COMPUTER PROCESSOR USING A PREFETCH PR...

DYNAMIC SEQUENTIAL INSTRUCTION PREFETCHING

TESTING CONTENT ADDRESSABLE MEMORY AND RANDOM ACCESS MEMORY

TESTING CONTENT ADDRESSABLE MEMORY AND RANDOM ACCESS MEMORY

TESTING CONTENT ADDRESSABLE MEMORY AND RANDOM ACCESS MEMORY

TECHNIQUES FOR DYNAMIC SEQUENTIAL INSTRUCTION PREFETCHING

INSTRUCTION PREFETCHING IN A COMPUTER PROCESSOR

BLOCKING INSTRUCTION FETCHING IN A COMPUTER PROCESSOR

Method for Detecting Address Match in a Deeply Pipelined Processor...

Predicting the Instruction Cache Way for High Power Applications

DATA PROCESSING SYSTEM, PROCESSOR AND METHOD OF DATA PROCESSING HAV...

System and Method for Tracking Changes in L1 Data Cache Directory

Mechanism in a Multi-Threaded Microprocessor to Maintain Best Case...

SYSTEM FOR GENERATING EFFECTIVE ADDRESS

METHOD TO OPTIMIZE EFFECTIVE PAGE NUMBER TO REAL PAGE NUMBER TRANSL...

METHOD AND APPARATUS FOR EFFICIENTLY ACCESSING BOTH ALIGNED AND UNA...

Lookahead mode sequencer

Method and apparatus for efficiently accessing both aligned and una...

Mechanism in a multi-threaded microprocessor to maintain best case...

Mini-refresh processor recovery as bug workaround method using exis...

Method, apparatus, and computer program product for sharing data in...