Sheng-Hsiung Hsueh

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Flash memory array system including a top gate memory cell
- Patent number 8,270,213
- Issue date Sep 18, 2012
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory array system including a top gate memory cell
- Patent number 7,848,140
- Issue date Dec 7, 2010
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory array system including a top gate memory cell
- Patent number 7,778,080
- Issue date Aug 17, 2010
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory array with a top gate line dynamically coupled to a wo...
- Patent number 7,663,921
- Issue date Feb 16, 2010
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory array system including a top gate memory cell
- Patent number 7,626,863
- Issue date Dec 1, 2009
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory array having control/decode circuitry for disabling to...
- Patent number 7,567,458
- Issue date Jul 28, 2009
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for handling a defective top gate of a source-side injection...
- Patent number 7,447,073
- Issue date Nov 4, 2008
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual reference cell for split-gate nonvolatile semiconductor memory
- Patent number 6,687,162
- Issue date Feb 3, 2004
- Winbond Electronics Corporation
- Sheng-Hsiung Hsueh
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
FLASH MEMORY ARRAY SYSTEM INCLUDING A TOP GATE MEMORY CELL
- Publication number 20110122693
- Publication date May 26, 2011
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Application
FLASH MEMORY ARRAY SYSTEM INCLUDING A TOP GATE MEMORY CELL
- Publication number 20090323415
- Publication date Dec 31, 2009
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Application
FLASH MEMORY ARRAY SYSTEM INCLUDING A TOP GATE MEMORY CELL
- Publication number 20090067239
- Publication date Mar 12, 2009
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Application
FLASH MEMORY ARRAY SYSTEM INCLUDING A TOP GATE MEMORY CELL
- Publication number 20090052248
- Publication date Feb 26, 2009
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Application
Flash memory array system including a top gate memory cell
- Publication number 20070147111
- Publication date Jun 28, 2007
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Application
Flash memory array system including a top gate memory cell
- Publication number 20070147131
- Publication date Jun 28, 2007
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Application
Flash memory array system including a top gate memory cell
- Publication number 20070070703
- Publication date Mar 29, 2007
- Hieu Van Tran
- G11 - INFORMATION STORAGE

Sheng-Hsiung Hsueh

Person

Patents Grantslast 30 patents

Flash memory array system including a top gate memory cell

Flash memory array system including a top gate memory cell

Flash memory array system including a top gate memory cell

Flash memory array with a top gate line dynamically coupled to a wo...

Flash memory array system including a top gate memory cell

Flash memory array having control/decode circuitry for disabling to...

Method for handling a defective top gate of a source-side injection...

Dual reference cell for split-gate nonvolatile semiconductor memory

Patents Applicationslast 30 patents

FLASH MEMORY ARRAY SYSTEM INCLUDING A TOP GATE MEMORY CELL

FLASH MEMORY ARRAY SYSTEM INCLUDING A TOP GATE MEMORY CELL

FLASH MEMORY ARRAY SYSTEM INCLUDING A TOP GATE MEMORY CELL

FLASH MEMORY ARRAY SYSTEM INCLUDING A TOP GATE MEMORY CELL

Flash memory array system including a top gate memory cell

Flash memory array system including a top gate memory cell

Flash memory array system including a top gate memory cell