Shigeki TOMISHIMA

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Two transistor gain cell memory with indium gallium zinc oxide
- Patent number 12,191,135
- Issue date Jan 7, 2025
- Intel Corporation
- Shigeki Tomishima
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Data processing near data storage
- Patent number 12,182,455
- Issue date Dec 31, 2024
- Intel Corporation
- Nilesh N. Shah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques to couple high bandwidth memory device on silicon substr...
- Patent number 12,087,352
- Issue date Sep 10, 2024
- Tahoe Research, LTD.
- Chong J. Zhao
- G11 - INFORMATION STORAGE
Information Patent Grant
Data processing near data storage
- Patent number 11,868,665
- Issue date Jan 9, 2024
- Intel Corporation
- Nilesh N. Shah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques to couple high bandwidth memory device on silicon substr...
- Patent number 11,776,619
- Issue date Oct 3, 2023
- Tahoe Research, LTD.
- Chong J. Zhao
- G11 - INFORMATION STORAGE
Information Patent Grant
Technologies for preserving error correction capability in compute-...
- Patent number 11,687,404
- Issue date Jun 27, 2023
- Intel Corporation
- Chetan Chauhan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for performing macro operations in memory
- Patent number 11,620,358
- Issue date Apr 4, 2023
- Intel Corporation
- Chetan Chauhan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques to couple high bandwidth memory device on silicon substr...
- Patent number 11,557,333
- Issue date Jan 17, 2023
- Tahoe Research, LTD.
- Chong J. Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Architecture and processes to enable high capacity memory packages...
- Patent number 11,456,281
- Issue date Sep 27, 2022
- Intel Corporation
- Yí Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technologies for providing multiple tier memory media management
- Patent number 11,301,167
- Issue date Apr 12, 2022
- Intel Corporation
- Jawad B. Khan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing near data storage
- Patent number 11,262,954
- Issue date Mar 1, 2022
- Intel Corporation
- Nilesh N. Shah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for providing ECC pre-provisioning and handling for cr...
- Patent number 11,237,903
- Issue date Feb 1, 2022
- Intel Corporation
- Rajesh Sundaram
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for providing adaptive memory media management
- Patent number 11,182,158
- Issue date Nov 23, 2021
- Intel Corporation
- Bruce Querbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for preserving error correction capability in compute-...
- Patent number 11,182,242
- Issue date Nov 23, 2021
- Intel Corporation
- Chetan Chauhan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for providing a scalable architecture for performing c...
- Patent number 11,080,226
- Issue date Aug 3, 2021
- Intel Corporation
- Shigeki Tomishima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques to couple high bandwidth memory device on silicon substr...
- Patent number 11,056,179
- Issue date Jul 6, 2021
- Intel Corporation
- Chong J. Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technologies for providing multiple levels of error correction
- Patent number 11,023,320
- Issue date Jun 1, 2021
- Intel Corporation
- Wei Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatus for combatting direct memory access...
- Patent number 10,783,281
- Issue date Sep 22, 2020
- Intel Corporation
- Anna Trikalinou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitcell state retention
- Patent number 10,600,462
- Issue date Mar 24, 2020
- Intel Corporation
- Charles Augustine
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive error correction in memory devices
- Patent number 10,552,257
- Issue date Feb 4, 2020
- Intel Corporation
- Helia Naeimi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for providing a scalable architecture for performing c...
- Patent number 10,534,747
- Issue date Jan 14, 2020
- Intel Corporation
- Shigeki Tomishima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable data pattern for repeated writes to memory
- Patent number 10,490,239
- Issue date Nov 26, 2019
- Intel Corporation
- Shigeki Tomishima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for performing a calculation across a memory array
- Patent number 10,418,098
- Issue date Sep 17, 2019
- Intel Corporation
- Srikanth T. Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Magnetic storage cell memory with back hop-prevention
- Patent number 10,297,302
- Issue date May 21, 2019
- Intel Corporation
- Charles Augustine
- G11 - INFORMATION STORAGE
Information Patent Grant
DRAM data path sharing via a split local data bus
- Patent number 10,217,493
- Issue date Feb 26, 2019
- Intel Corporation
- Wei Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DRAM data path sharing via a segmented global data bus
- Patent number 10,083,140
- Issue date Sep 25, 2018
- Intel Corporation
- Wei Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for accessing and scheduling between a plur...
- Patent number 10,068,636
- Issue date Sep 4, 2018
- Intel Corporation
- Berkin Akin
- G11 - INFORMATION STORAGE
Information Patent Grant
Technologies for physically unclonable functions with magnetic tunn...
- Patent number 10,069,628
- Issue date Sep 4, 2018
- Intel Corporation
- Shigeki Tomishima
- G11 - INFORMATION STORAGE
Information Patent Grant
Supply-switched dual cell memory bitcell
- Patent number 10,056,127
- Issue date Aug 21, 2018
- Intel Corporation
- Shigeki Tomishima
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for a write zero operation
- Patent number 10,031,684
- Issue date Jul 24, 2018
- Intel Corporation
- Shigeki Tomishima
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
TWO TRANSISTOR GAIN CELL MEMORY WITH INDIUM GALLIUM ZINC OXIDE
- Publication number 20250031453
- Publication date Jan 23, 2025
- Intel Corporation
- Shigeki TOMISHIMA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUES TO COUPLE HIGH BANDWIDTH MEMORY DEVICE ON SILICON SUBSTR...
- Publication number 20250006250
- Publication date Jan 2, 2025
- Tahoe Research, Ltd.
- Chong J. ZHAO
- G11 - INFORMATION STORAGE
Information Patent Application
RUNTIME ALERT SIGNAL ACTIVATION TEST MODE
- Publication number 20240404617
- Publication date Dec 5, 2024
- Intel Corporation
- Kuljit S. Bains
- G11 - INFORMATION STORAGE
Information Patent Application
DATA PROCESSING NEAR DATA STORAGE
- Publication number 20240078051
- Publication date Mar 7, 2024
- Intel Corporation
- Nilesh N. SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC SWITCH FOR MEMORY DEVICES
- Publication number 20240028531
- Publication date Jan 25, 2024
- Intel Corporation
- John R. DREW
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES TO COUPLE HIGH BANDWIDTH MEMORY DEVICE ON SILICON SUBSTR...
- Publication number 20240029785
- Publication date Jan 25, 2024
- Tahoe Research, Ltd.
- Chong J. ZHAO
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT DIE FOR EFFICIENT INCORPORATION IN A DIE STACK
- Publication number 20230207428
- Publication date Jun 29, 2023
- Intel Corporation
- Surhud Khare
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUES TO COUPLE HIGH BANDWIDTH MEMORY DEVICE ON SILICON SUBSTR...
- Publication number 20230145937
- Publication date May 11, 2023
- Tahoe Research, Ltd.
- Chong J. ZHAO
- G11 - INFORMATION STORAGE
Information Patent Application
TWO-DIMENSIONAL DATA ACCESS FOR VOLATILE MEMORY
- Publication number 20220350525
- Publication date Nov 3, 2022
- Intel Corporation
- Sourabh Dongaonkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WEIGHT STATIONARY IN-MEMORY-COMPUTING NEURAL NETWORK ACCELERATOR WI...
- Publication number 20220334801
- Publication date Oct 20, 2022
- Intel Corporation
- Hechen Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH SPEED MEMORY SYSTEM INTEGRATION
- Publication number 20220197806
- Publication date Jun 23, 2022
- Intel Corporation
- Shigeki TOMISHIMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING NEAR DATA STORAGE
- Publication number 20220179594
- Publication date Jun 9, 2022
- Intel Corporation
- Nilesh N. SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR PRESERVING ERROR CORRECTION CAPABILITY IN COMPUTE-...
- Publication number 20220075684
- Publication date Mar 10, 2022
- Intel Corporation
- Chetan Chauhan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH SPEED MEMORY SYSTEM INTEGRATION
- Publication number 20210391301
- Publication date Dec 16, 2021
- Intel Corporation
- Shigeki TOMISHIMA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUES TO COUPLE HIGH BANDWIDTH MEMORY DEVICE ON SILICON SUBSTR...
- Publication number 20210335414
- Publication date Oct 28, 2021
- Intel Corporation
- Chong J. ZHAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED MEMORY CHIP SOLUTION WITH REDUCED PACKAGE INPUTS/OUTPUTS (I...
- Publication number 20210335393
- Publication date Oct 28, 2021
- Intel Corporation
- Chong J. ZHAO
- G11 - INFORMATION STORAGE
Information Patent Application
TWO TRANSISTOR GAIN CELL MEMORY WITH INDIUM GALLIUM ZINC OXIDE
- Publication number 20210151437
- Publication date May 20, 2021
- Intel Corporation
- Shigeki TOMISHIMA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNOLOGIES FOR PROVIDING A SCALABLE ARCHITECTURE FOR PERFORMING C...
- Publication number 20200311019
- Publication date Oct 1, 2020
- Intel Corporation
- Shigeki Tomishima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING NEAR DATA STORAGE
- Publication number 20200167098
- Publication date May 28, 2020
- Intel Corporation
- Nilesh N. SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES TO COUPLE HIGH BANDWIDTH MEMORY DEVICE ON SILICON SUBSTR...
- Publication number 20200143870
- Publication date May 7, 2020
- Intel Corporation
- Chong J. ZHAO
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH BANDWIDTH DRAM MEMORY WITH WIDE PREFETCH
- Publication number 20200135259
- Publication date Apr 30, 2020
- Intel Corporation
- Shigeki Tomishima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE AND PROCESSES TO ENABLE HIGH CAPACITY MEMORY PACKAGES...
- Publication number 20200105719
- Publication date Apr 2, 2020
- Intel Corporation
- Yi LI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNOLOGIES FOR PROVIDING ECC PRE-PROVISIONING AND HANDLING FOR CR...
- Publication number 20190310911
- Publication date Oct 10, 2019
- Intel Corporation
- Rajesh Sundaram
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR PRESERVING ERROR CORRECTION CAPABILITY IN COMPUTE-...
- Publication number 20190303237
- Publication date Oct 3, 2019
- Intel Corporation
- Chetan Chauhan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR PROVIDING ADAPTIVE MEMORY MEDIA MANAGEMENT
- Publication number 20190272173
- Publication date Sep 5, 2019
- Intel Corporation
- Bruce Querbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR PROVIDING MULTIPLE TIER MEMORY MEDIA MANAGEMENT
- Publication number 20190272121
- Publication date Sep 5, 2019
- Intel Corporation
- Jawad B. Khan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR PERFORMING MACRO OPERATIONS IN MEMORY
- Publication number 20190266219
- Publication date Aug 29, 2019
- Intel Corporation
- Chetan Chauhan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR PROVIDING A SCALABLE ARCHITECTURE FOR PERFORMING C...
- Publication number 20190227981
- Publication date Jul 25, 2019
- Intel Corporation
- Shigeki Tomishima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR PERFORMING TENSOR OPERATIONS IN MEMORY
- Publication number 20190227750
- Publication date Jul 25, 2019
- Intel Corporation
- Srikanth Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR PROVIDING MULTIPLE LEVELS OF ERROR CORRECTION
- Publication number 20190227871
- Publication date Jul 25, 2019
- Intel Corporation
- Wei Wu
- G06 - COMPUTING CALCULATING COUNTING

Shigeki TOMISHIMA

Person

Patents Grantslast 30 patents

Two transistor gain cell memory with indium gallium zinc oxide

Data processing near data storage

Techniques to couple high bandwidth memory device on silicon substr...

Data processing near data storage

Techniques to couple high bandwidth memory device on silicon substr...

Technologies for preserving error correction capability in compute-...

Technologies for performing macro operations in memory

Techniques to couple high bandwidth memory device on silicon substr...

Architecture and processes to enable high capacity memory packages...

Technologies for providing multiple tier memory media management

Data processing near data storage

Technologies for providing ECC pre-provisioning and handling for cr...

Technologies for providing adaptive memory media management

Technologies for preserving error correction capability in compute-...

Technologies for providing a scalable architecture for performing c...

Techniques to couple high bandwidth memory device on silicon substr...

Technologies for providing multiple levels of error correction

Systems, methods, and apparatus for combatting direct memory access...

Bitcell state retention

Adaptive error correction in memory devices

Technologies for providing a scalable architecture for performing c...

Programmable data pattern for repeated writes to memory

Methods and systems for performing a calculation across a memory array

Magnetic storage cell memory with back hop-prevention

DRAM data path sharing via a split local data bus

DRAM data path sharing via a segmented global data bus

Apparatuses and methods for accessing and scheduling between a plur...

Technologies for physically unclonable functions with magnetic tunn...

Supply-switched dual cell memory bitcell

Techniques for a write zero operation

Patents Applicationslast 30 patents

TWO TRANSISTOR GAIN CELL MEMORY WITH INDIUM GALLIUM ZINC OXIDE

TECHNIQUES TO COUPLE HIGH BANDWIDTH MEMORY DEVICE ON SILICON SUBSTR...

RUNTIME ALERT SIGNAL ACTIVATION TEST MODE

DATA PROCESSING NEAR DATA STORAGE

DYNAMIC SWITCH FOR MEMORY DEVICES

TECHNIQUES TO COUPLE HIGH BANDWIDTH MEMORY DEVICE ON SILICON SUBSTR...

INTEGRATED CIRCUIT DIE FOR EFFICIENT INCORPORATION IN A DIE STACK

TECHNIQUES TO COUPLE HIGH BANDWIDTH MEMORY DEVICE ON SILICON SUBSTR...

TWO-DIMENSIONAL DATA ACCESS FOR VOLATILE MEMORY

WEIGHT STATIONARY IN-MEMORY-COMPUTING NEURAL NETWORK ACCELERATOR WI...

HIGH SPEED MEMORY SYSTEM INTEGRATION

DATA PROCESSING NEAR DATA STORAGE

TECHNOLOGIES FOR PRESERVING ERROR CORRECTION CAPABILITY IN COMPUTE-...

HIGH SPEED MEMORY SYSTEM INTEGRATION

TECHNIQUES TO COUPLE HIGH BANDWIDTH MEMORY DEVICE ON SILICON SUBSTR...

STACKED MEMORY CHIP SOLUTION WITH REDUCED PACKAGE INPUTS/OUTPUTS (I...

TWO TRANSISTOR GAIN CELL MEMORY WITH INDIUM GALLIUM ZINC OXIDE

TECHNOLOGIES FOR PROVIDING A SCALABLE ARCHITECTURE FOR PERFORMING C...

DATA PROCESSING NEAR DATA STORAGE

TECHNIQUES TO COUPLE HIGH BANDWIDTH MEMORY DEVICE ON SILICON SUBSTR...

HIGH BANDWIDTH DRAM MEMORY WITH WIDE PREFETCH

ARCHITECTURE AND PROCESSES TO ENABLE HIGH CAPACITY MEMORY PACKAGES...

TECHNOLOGIES FOR PROVIDING ECC PRE-PROVISIONING AND HANDLING FOR CR...

TECHNOLOGIES FOR PRESERVING ERROR CORRECTION CAPABILITY IN COMPUTE-...

TECHNOLOGIES FOR PROVIDING ADAPTIVE MEMORY MEDIA MANAGEMENT

TECHNOLOGIES FOR PROVIDING MULTIPLE TIER MEMORY MEDIA MANAGEMENT

TECHNOLOGIES FOR PERFORMING MACRO OPERATIONS IN MEMORY

TECHNOLOGIES FOR PROVIDING A SCALABLE ARCHITECTURE FOR PERFORMING C...

TECHNOLOGIES FOR PERFORMING TENSOR OPERATIONS IN MEMORY

TECHNOLOGIES FOR PROVIDING MULTIPLE LEVELS OF ERROR CORRECTION