Shigeo Kawashima

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Kitakyusyu, JP

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Patents Grantslast 30 patents

Information Patent Grant
Dual sided integrated circuit chip package with offset wire bonds a...
- Patent number 5,545,922
- Issue date Aug 13, 1996
- Intel Corporation
- Suresh V. Golwalkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing dual sided wire bonded integrated circuit chip packag...
- Patent number 5,527,740
- Issue date Jun 18, 1996
- Intel Corporation
- Suresh V. Golwalkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for constructing a dual sided, wire bonded integrated circui...
- Patent number 5,366,933
- Issue date Nov 22, 1994
- Intel Corporation
- Suresh V. Golwalkar
- H01 - BASIC ELECTRIC ELEMENTS