Shih-Chieh R. Wen

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Scalable interrupts
- Patent number 12,007,920
- Issue date Jun 11, 2024
- Apple Inc.
- Jeffrey E. Gonion
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Peak power management for processing units
- Patent number 11,698,671
- Issue date Jul 11, 2023
- Apple Inc.
- Preethi Bhargavi Sama
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable interrupts
- Patent number 11,630,789
- Issue date Apr 18, 2023
- Apple Inc.
- Jeffrey E. Gonion
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for partially preserving a branch predictor state
- Patent number 11,093,249
- Issue date Aug 17, 2021
- Apple Inc.
- Conrado Blasco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architected state retention for a frequent operating state switchin...
- Patent number 10,990,159
- Issue date Apr 27, 2021
- Apple Inc.
- Bernard Joseph Semeria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Intracluster and intercluster interprocessor interrupts including a...
- Patent number 10,496,572
- Issue date Dec 3, 2019
- Apple Inc.
- John H. Kelm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing capacitor-induced noise
- Patent number 10,416,692
- Issue date Sep 17, 2019
- Apple Inc.
- Jong-Suk Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing power state in one power domain based on power states in a...
- Patent number 10,410,688
- Issue date Sep 10, 2019
- Apple Inc.
- Shih-Chieh Wen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single power plane dynamic voltage margin recovery for multiple clo...
- Patent number 10,401,938
- Issue date Sep 3, 2019
- Apple Inc.
- Jong-Suk Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for partially saving a branch predictor state
- Patent number 10,223,123
- Issue date Mar 5, 2019
- Apple Inc.
- Conrado Blasco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing power state in one power domain based on power states in a...
- Patent number 10,147,464
- Issue date Dec 4, 2018
- Apple Inc.
- Shih-Chieh Wen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware migration between dissimilar cores
- Patent number 9,928,115
- Issue date Mar 27, 2018
- Apple Inc.
- James N. Hardage
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
L2 flush and memory fabric teardown
- Patent number 9,541,984
- Issue date Jan 10, 2017
- Apple Inc.
- Shih-Chieh R. Wen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to manage current during clock frequency changes
- Patent number 9,411,360
- Issue date Aug 9, 2016
- Apple Inc.
- Jong-Suk Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-core processor instruction throttling
- Patent number 9,383,806
- Issue date Jul 5, 2016
- Apple Inc.
- Wei-Han Lien
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Pre-program of clock generation circuit for faster lock coming out...
- Patent number 9,294,103
- Issue date Mar 22, 2016
- Apple Inc.
- Jong-Suk Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Combining write buffer with dynamically adjustable flush metrics
- Patent number 8,566,528
- Issue date Oct 22, 2013
- Apple Inc.
- Peter J. Bannon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combining write buffer with dynamically adjustable flush metrics
- Patent number 8,352,685
- Issue date Jan 8, 2013
- Apple Inc.
- Peter J. Bannon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined multiplex or/flop
- Patent number 7,245,150
- Issue date Jul 17, 2007
- P.A. Semi, Inc.
- Rajat Goel
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
Scalable Interrupts
- Publication number 20240311319
- Publication date Sep 19, 2024
- Apple Inc.
- Jeffrey E. Gonion
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable Interrupts
- Publication number 20230251985
- Publication date Aug 10, 2023
- Apple Inc.
- Jeffrey E. Gonion
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PEAK POWER MANAGEMENT FOR PROCESSING UNITS
- Publication number 20230092988
- Publication date Mar 23, 2023
- Apple Inc.
- Preethi Bhargavi SAMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable Interrupts
- Publication number 20220083484
- Publication date Mar 17, 2022
- Apple Inc.
- Jeffrey E. Gonion
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Managing Power State in One Power Domain Based on Power States in A...
- Publication number 20190221241
- Publication date Jul 18, 2019
- Apple Inc.
- Shih-Chieh Wen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR PARTIALLY SAVING A BRANCH PREDICTOR STATE
- Publication number 20190196834
- Publication date Jun 27, 2019
- Apple Inc.
- Conrado Blasco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Reducing Capacitor-Induced Noise
- Publication number 20190086942
- Publication date Mar 21, 2019
- Apple Inc.
- Jong-Suk Lee
- G05 - CONTROLLING REGULATING
Information Patent Application
ARCHITECTED STATE RETENTION
- Publication number 20180307297
- Publication date Oct 25, 2018
- Apple Inc.
- Bernard Joseph Semeria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hardware Migration between Dissimilar Cores
- Publication number 20170068575
- Publication date Mar 9, 2017
- Apple Inc.
- James N. Hardage
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pre-Program of Clock Generation Circuit for Faster Lock Coming Out...
- Publication number 20150236705
- Publication date Aug 20, 2015
- Apple Inc.
- Jong-Suk Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD TO MANAGE CURRENT DURING CLOCK FREQUENCY CHANGES
- Publication number 20150198966
- Publication date Jul 16, 2015
- Jong-Suk Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
L2 FLUSH AND MEMORY FABRIC TEARDOWN
- Publication number 20140365798
- Publication date Dec 11, 2014
- Shih-Chieh R. Wen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE PROCESSOR INSTRUCTION THROTTLING
- Publication number 20140317425
- Publication date Oct 23, 2014
- Apple Inc.
- Wei-Han Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Combining Write Buffer with Dynamically Adjustable Flush Metrics
- Publication number 20130103906
- Publication date Apr 25, 2013
- Apple Inc.
- Peter J. Bannon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Combining Write Buffer with Dynamically Adjustable Flush Metrics
- Publication number 20120047332
- Publication date Feb 23, 2012
- Peter J. Bannon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Combined multiplexor/flop
- Publication number 20070139075
- Publication date Jun 21, 2007
- P.A. Semi, Inc.
- Rajat Goel
- H03 - BASIC ELECTRONIC CIRCUITRY

Shih-Chieh R. Wen

Person

Patents Grantslast 30 patents

Scalable interrupts

Peak power management for processing units

Scalable interrupts

Methods for partially preserving a branch predictor state

Architected state retention for a frequent operating state switchin...

Intracluster and intercluster interprocessor interrupts including a...

Method and apparatus for reducing capacitor-induced noise

Managing power state in one power domain based on power states in a...

Single power plane dynamic voltage margin recovery for multiple clo...

Methods for partially saving a branch predictor state

Managing power state in one power domain based on power states in a...

Hardware migration between dissimilar cores

L2 flush and memory fabric teardown

Method to manage current during clock frequency changes

Multi-core processor instruction throttling

Pre-program of clock generation circuit for faster lock coming out...

Combining write buffer with dynamically adjustable flush metrics

Combining write buffer with dynamically adjustable flush metrics

Combined multiplex or/flop

Patents Applicationslast 30 patents

Scalable Interrupts

Scalable Interrupts

PEAK POWER MANAGEMENT FOR PROCESSING UNITS

Scalable Interrupts

Managing Power State in One Power Domain Based on Power States in A...

METHODS FOR PARTIALLY SAVING A BRANCH PREDICTOR STATE

Method and Apparatus for Reducing Capacitor-Induced Noise

ARCHITECTED STATE RETENTION

Hardware Migration between Dissimilar Cores

Pre-Program of Clock Generation Circuit for Faster Lock Coming Out...

METHOD TO MANAGE CURRENT DURING CLOCK FREQUENCY CHANGES

L2 FLUSH AND MEMORY FABRIC TEARDOWN

MULTI-CORE PROCESSOR INSTRUCTION THROTTLING

Combining Write Buffer with Dynamically Adjustable Flush Metrics

Combining Write Buffer with Dynamically Adjustable Flush Metrics

Combined multiplexor/flop