Shih-Wei Chou

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
C-PHY receiver with self-regulated common mode servo loop
- Patent number 11,764,733
- Issue date Sep 19, 2023
- QUALCOMM Incorporated
- Shih-Wei Chou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
C-PHY half-rate wire state encoder and decoder
- Patent number 11,641,294
- Issue date May 2, 2023
- QUALCOMM Incorporated
- Chulkyu Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Small loop delay clock and data recovery block for high-speed next...
- Patent number 11,411,711
- Issue date Aug 9, 2022
- QUALCOMM Incorporated
- Ying Duan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
C-PHY data-triggered edge generation with intrinsic half-rate opera...
- Patent number 11,327,914
- Issue date May 10, 2022
- QUALCOMM Incorporated
- Da Ying
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
C-PHY half-rate wire state encoder and decoder
- Patent number 11,240,077
- Issue date Feb 1, 2022
- QUALCOMM Incorporated
- Chulkyu Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Seperation of low-power and high-speed analog front-end receivers
- Patent number 11,106,610
- Issue date Aug 31, 2021
- QUALCOMM Incorporated
- Ying Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Small loop delay clock and data recovery block for high-speed next...
- Patent number 11,095,425
- Issue date Aug 17, 2021
- QUALCOMM Incorporated
- Ying Duan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Open-loop, super fast, half-rate clock and data recovery for next g...
- Patent number 11,038,666
- Issue date Jun 15, 2021
- QUALCOMM Incorporated
- Ying Duan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
MIPI D-PHY receiver auto rate detection and high-speed settle time...
- Patent number 11,023,409
- Issue date Jun 1, 2021
- QUALCOMM Incorporated
- Yasser Ahmed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power physical layer driver topologies
- Patent number 10,833,899
- Issue date Nov 10, 2020
- QUALCOMM Incorporated
- Shih-Wei Chou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fully compensated complementary duty cycle correction circuits
- Patent number 10,615,785
- Issue date Apr 7, 2020
- QUALCOMM Incorporated
- Shih-Wei Chou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low power physical layer driver topologies
- Patent number 10,419,252
- Issue date Sep 17, 2019
- QUALCOMM Incorporated
- Shih-Wei Chou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
C-PHY training pattern for adaptive equalization, adaptive edge tra...
- Patent number 10,419,246
- Issue date Sep 17, 2019
- QUALCOMM Incorporated
- Ying Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three-input continuous-time amplifier and equalizer for multi-level...
- Patent number 10,389,315
- Issue date Aug 20, 2019
- QUALCOMM Incorporated
- Chulkyu Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Calibration pattern and duty-cycle distortion correction for clock...
- Patent number 10,333,690
- Issue date Jun 25, 2019
- QUALCOMM Incorporated
- Ying Duan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multiphase clock data recovery with adaptive tracking for a multi-w...
- Patent number 10,298,381
- Issue date May 21, 2019
- QUALCOMM Incorporated
- Chulkyu Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reducing transmitter encoding jitter in a C-PHY interface using mul...
- Patent number 10,289,600
- Issue date May 14, 2019
- QUALCOMM Incorporated
- Dhaval Sejpal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power physical layer driver topologies
- Patent number 9,998,154
- Issue date Jun 12, 2018
- QUALCOMM Incorporated
- Shih-Wei Chou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Intelligent equalization for a three-transmitter multi-phase system
- Patent number 9,819,523
- Issue date Nov 14, 2017
- QUALCOMM Incorporated
- Chulkyu Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multiphase clock data recovery for a 3-phase interface
- Patent number 9,496,879
- Issue date Nov 15, 2016
- QUALCOMM Incorporated
- Ying Duan
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
C-PHY RECEIVER WITH SELF-REGULATED COMMON MODE SERVO LOOP
- Publication number 20230087897
- Publication date Mar 23, 2023
- QUALCOMM Incorporated
- Shih-Wei CHOU
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
C-PHY HALF-RATE WIRE STATE ENCODER AND DECODER
- Publication number 20220158879
- Publication date May 19, 2022
- QUALCOMM Incorporated
- Chulkyu Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SMALL LOOP DELAY CLOCK AND DATA RECOVERY BLOCK FOR HIGH-SPEED NEXT...
- Publication number 20210336760
- Publication date Oct 28, 2021
- QUALCOMM Incorporated
- Ying DUAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
OPEN-LOOP, SUPER FAST, HALF-RATE CLOCK AND DATA RECOVERY FOR NEXT G...
- Publication number 20210184829
- Publication date Jun 17, 2021
- QUALCOMM Incorporated
- Ying DUAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SMALL LOOP DELAY CLOCK AND DATA RECOVERY BLOCK FOR HIGH-SPEED NEXT...
- Publication number 20210126765
- Publication date Apr 29, 2021
- QUALCOMM Incorporated
- Ying DUAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
C-PHY HALF-RATE WIRE STATE ENCODER AND DECODER
- Publication number 20210126819
- Publication date Apr 29, 2021
- QUALCOMM Incorporated
- Chulkyu Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MIPI D-PHY RECEIVER AUTO RATE DETECTION AND HIGH-SPEED SETTLE TIME...
- Publication number 20210103547
- Publication date Apr 8, 2021
- QUALCOMM Incorporated
- Yasser AHMED
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ANALOG FRONT-END RECEIVERS
- Publication number 20210081339
- Publication date Mar 18, 2021
- QUALCOMM Incorporated
- Ying DUAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES
- Publication number 20190356519
- Publication date Nov 21, 2019
- QUALCOMM Incorporated
- Shih-Wei Chou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
THREE-INPUT CONTINUOUS-TIME AMPLIFIER AND EQUALIZER FOR MULTI-LEVEL...
- Publication number 20180358939
- Publication date Dec 13, 2018
- QUALCOMM Incorporated
- Chulkyu Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES
- Publication number 20180337698
- Publication date Nov 22, 2018
- QUALCOMM Incorporated
- Shih-Wei Chou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES
- Publication number 20180234122
- Publication date Aug 16, 2018
- QUALCOMM Incorporated
- Shih-Wei Chou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
C-PHY TRAINING PATTERN FOR ADAPTIVE EQUALIZATION, ADAPTIVE EDGE TRA...
- Publication number 20180062883
- Publication date Mar 1, 2018
- QUALCOMM Incorporated
- Ying Duan
- G01 - MEASURING TESTING
Information Patent Application
INTELLIGENT EQUALIZATION FOR A THREE-TRANSMITTER MULTI-PHASE SYSTEM
- Publication number 20170264471
- Publication date Sep 14, 2017
- QUALCOMM Incorporated
- Chulkyu Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
REDUCING TRANSMITTER ENCODING JITTER IN A C-PHY INTERFACE USING MUL...
- Publication number 20170039163
- Publication date Feb 9, 2017
- QUALCOMM Incorporated
- Dhaval Sejpal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES
- Publication number 20160373141
- Publication date Dec 22, 2016
- QUALCOMM Incorporated
- Shih-Wei Chou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Shih-Wei Chou

Person

Patents Grantslast 30 patents

C-PHY receiver with self-regulated common mode servo loop

C-PHY half-rate wire state encoder and decoder

Small loop delay clock and data recovery block for high-speed next...

C-PHY data-triggered edge generation with intrinsic half-rate opera...

C-PHY half-rate wire state encoder and decoder

Seperation of low-power and high-speed analog front-end receivers

Small loop delay clock and data recovery block for high-speed next...

Open-loop, super fast, half-rate clock and data recovery for next g...

MIPI D-PHY receiver auto rate detection and high-speed settle time...

Low power physical layer driver topologies

Fully compensated complementary duty cycle correction circuits

Low power physical layer driver topologies

C-PHY training pattern for adaptive equalization, adaptive edge tra...

Three-input continuous-time amplifier and equalizer for multi-level...

Calibration pattern and duty-cycle distortion correction for clock...

Multiphase clock data recovery with adaptive tracking for a multi-w...

Reducing transmitter encoding jitter in a C-PHY interface using mul...

Low power physical layer driver topologies

Intelligent equalization for a three-transmitter multi-phase system

Multiphase clock data recovery for a 3-phase interface

Patents Applicationslast 30 patents

C-PHY RECEIVER WITH SELF-REGULATED COMMON MODE SERVO LOOP

C-PHY HALF-RATE WIRE STATE ENCODER AND DECODER

SMALL LOOP DELAY CLOCK AND DATA RECOVERY BLOCK FOR HIGH-SPEED NEXT...

OPEN-LOOP, SUPER FAST, HALF-RATE CLOCK AND DATA RECOVERY FOR NEXT G...

SMALL LOOP DELAY CLOCK AND DATA RECOVERY BLOCK FOR HIGH-SPEED NEXT...

C-PHY HALF-RATE WIRE STATE ENCODER AND DECODER

MIPI D-PHY RECEIVER AUTO RATE DETECTION AND HIGH-SPEED SETTLE TIME...

ANALOG FRONT-END RECEIVERS

LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES

THREE-INPUT CONTINUOUS-TIME AMPLIFIER AND EQUALIZER FOR MULTI-LEVEL...

LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES

LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES

C-PHY TRAINING PATTERN FOR ADAPTIVE EQUALIZATION, ADAPTIVE EDGE TRA...

INTELLIGENT EQUALIZATION FOR A THREE-TRANSMITTER MULTI-PHASE SYSTEM

REDUCING TRANSMITTER ENCODING JITTER IN A C-PHY INTERFACE USING MUL...

LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES