Shinichiro Ikeda

Person

Kasugai, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Memory interface circuit and timing adjusting method
- Patent number 8,982,650
- Issue date Mar 17, 2015
- Fujitsu Semiconductor Limited
- Hitoaki Nishiwaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Parallel-serial conversion circuit for adjusting an output timing o...
- Patent number 8,934,316
- Issue date Jan 13, 2015
- Fujitsu Semiconductor Limited
- Shinichiro Ikeda
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller device, control method for memory controller devi...
- Patent number 8,185,760
- Issue date May 22, 2012
- Fujitsu Semiconductor Limited
- Akihiro Takakura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device and semiconductor device module
- Patent number 7,859,284
- Issue date Dec 28, 2010
- Fujitsu Semiconductor Limited
- Shinichiro Ikeda
- G01 - MEASURING TESTING
Information Patent Grant
Memory device and internal control method therefor
- Patent number 7,133,996
- Issue date Nov 7, 2006
- Fujitsu Limited
- Shinichiro Ikeda
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous semiconductor memory device and method for controlling...
- Patent number 6,466,492
- Issue date Oct 15, 2002
- Fujitsu Limited
- Shinichiro Ikeda
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit
- Patent number 6,418,072
- Issue date Jul 9, 2002
- Fujitsu Limited
- Yoshichika Nakaya
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and synchronous memory
- Patent number 6,411,564
- Issue date Jun 25, 2002
- Fujitsu Limited
- Shinichiro Ikeda
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous semiconductor device and method for latching input signals
- Patent number 6,385,127
- Issue date May 7, 2002
- Fujitsu Limited
- Shinichiro Ikeda
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
PARALLEL-SERIAL CONVERSION CIRCUIT, INTERFACE CIRCUIT, AND CONTROL...
- Publication number 20140133252
- Publication date May 15, 2014
- FUJITSU SEMICONDUCTOR LIMITED
- Shinichiro IKEDA
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY INTERFACE CIRCUIT AND TIMING ADJUSTING METHOD
- Publication number 20130070544
- Publication date Mar 21, 2013
- FUJITSU SEMICONDUCTOR LIMITED
- Hitoaki NISHIWAKI
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER DEVICE, CONTROL METHOD FOR MEMORY CONTROLLER DEVI...
- Publication number 20090249110
- Publication date Oct 1, 2009
- Fujitsu Microelectronics Limited
- Akihiro TAKAKURA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Device and Semiconductor Device Module
- Publication number 20080238469
- Publication date Oct 2, 2008
- FUJITSU LIMITED
- Shinichiro IKEDA
- G01 - MEASURING TESTING
Information Patent Application
DDR-SDRAM INTERFACE CIRCUITRY, AND METHOD AND SYSTEM FOR TESTING TH...
- Publication number 20080205170
- Publication date Aug 28, 2008
- FUJITSU LIMITED
- Shinichiro Ikeda
- G11 - INFORMATION STORAGE
Information Patent Application
Memory device and internal control method therefor
- Publication number 20030088753
- Publication date May 8, 2003
- FUJITSU LIMITED
- Shinichiro Ikeda
- G11 - INFORMATION STORAGE
Information Patent Application
SYNCHRONOUS SEMICONDUCTOR DEVICE AND METHOD FOR LATCHING INPUT SIGNALS
- Publication number 20020060945
- Publication date May 23, 2002
- FUJITSU LIMITED
- Shinichiro Ikeda
- G11 - INFORMATION STORAGE
Information Patent Application
Synchronous semiconductor memory device and method for controlling...
- Publication number 20020024882
- Publication date Feb 28, 2002
- FUJITSU LIMITED
- Shinichiro Ikeda
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device and synchronous memory
- Publication number 20010043504
- Publication date Nov 22, 2001
- FUJITSU LIMITED
- Shinichiro Ikeda
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor integrated circuit
- Publication number 20010010651
- Publication date Aug 2, 2001
- FUJITSU LIMITED
- Yoshichika Nakaya
- G11 - INFORMATION STORAGE

Shinichiro Ikeda

Person

Patents Grantslast 30 patents

Memory interface circuit and timing adjusting method

Parallel-serial conversion circuit for adjusting an output timing o...

Memory controller device, control method for memory controller devi...

Semiconductor device and semiconductor device module

Memory device and internal control method therefor

Synchronous semiconductor memory device and method for controlling...

Semiconductor integrated circuit

Semiconductor memory device and synchronous memory

Synchronous semiconductor device and method for latching input signals

Patents Applicationslast 30 patents

PARALLEL-SERIAL CONVERSION CIRCUIT, INTERFACE CIRCUIT, AND CONTROL...

MEMORY INTERFACE CIRCUIT AND TIMING ADJUSTING METHOD

MEMORY CONTROLLER DEVICE, CONTROL METHOD FOR MEMORY CONTROLLER DEVI...

Semiconductor Device and Semiconductor Device Module

DDR-SDRAM INTERFACE CIRCUITRY, AND METHOD AND SYSTEM FOR TESTING TH...

Memory device and internal control method therefor

SYNCHRONOUS SEMICONDUCTOR DEVICE AND METHOD FOR LATCHING INPUT SIGNALS

Synchronous semiconductor memory device and method for controlling...

Semiconductor memory device and synchronous memory

Semiconductor integrated circuit