Shinye Shiu

Person

Los Altos, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Processor to memory with coherency bypass
- Patent number 10,802,968
- Issue date Oct 13, 2020
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated DRAM with low-voltage swing I/O
- Patent number 10,607,977
- Issue date Mar 31, 2020
- Google LLC
- Shinye Shiu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory power savings in idle display case
- Patent number 10,310,586
- Issue date Jun 4, 2019
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system architecture
- Patent number 10,089,239
- Issue date Oct 2, 2018
- Google LLC
- Allan D. Knies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for monitoring system performance and dynamica...
- Patent number 9,892,054
- Issue date Feb 13, 2018
- Google LLC
- Shinye Shiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transparent hardware-assisted memory decompression
- Patent number 9,864,541
- Issue date Jan 9, 2018
- Google LLC
- Vyacheslav Vladimirovich Malyugin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for memory de-duplication
- Patent number 9,785,571
- Issue date Oct 10, 2017
- Google Inc.
- Shinye Shiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware-assisted memory compression management using page filter a...
- Patent number 9,740,631
- Issue date Aug 22, 2017
- Google Inc.
- Shinye Shiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coherence processing with pre-kill mechanism to avoid duplicated tr...
- Patent number 9,465,740
- Issue date Oct 11, 2016
- Apple Inc.
- Erik P. Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Advanced fine-grained cache power management
- Patent number 9,400,544
- Issue date Jul 26, 2016
- Apple Inc.
- Wolfgang H. Klingauf
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Cache allocation scheme optimized for browsing applications
- Patent number 9,396,122
- Issue date Jul 19, 2016
- Apple Inc.
- Sukalpa Biswas
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
System cache with sticky allocation
- Patent number 9,311,251
- Issue date Apr 12, 2016
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for sharing private caches in a SoC
- Patent number 9,280,471
- Issue date Mar 8, 2016
- Apple Inc.
- Manu Gulati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory power savings in idle display case
- Patent number 9,261,939
- Issue date Feb 16, 2016
- Apple Inc.
- Sukalpa Biswas
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
System cache with partial write valid states
- Patent number 9,218,286
- Issue date Dec 22, 2015
- Apple Inc.
- Sukalpa Biswas
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
System cache with coarse grain power management
- Patent number 9,218,040
- Issue date Dec 22, 2015
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System cache with speculative read engine
- Patent number 9,201,796
- Issue date Dec 1, 2015
- Apple Inc.
- Sukalpa Biswas
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
System cache with cache hint control
- Patent number 9,158,685
- Issue date Oct 13, 2015
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scheme to escalate requests with address conflicts
- Patent number 9,135,177
- Issue date Sep 15, 2015
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System cache with quota-based control
- Patent number 9,043,570
- Issue date May 26, 2015
- Apple Inc.
- Sukalpa Biswas
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Advanced coarse-grained cache power management
- Patent number 8,984,227
- Issue date Mar 17, 2015
- Apple Inc.
- Shinye Shiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System cache with fine grain power management
- Patent number 8,977,817
- Issue date Mar 10, 2015
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic level shifter circuit and ring oscillator using the same
- Patent number 8,912,853
- Issue date Dec 16, 2014
- Apple Inc.
- James E. Burnette
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System cache with sticky removal engine
- Patent number 8,886,886
- Issue date Nov 11, 2014
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic level shifter for interfacing signals referenced to differe...
- Patent number 8,559,247
- Issue date Oct 15, 2013
- Apple Inc.
- Shinye Shiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory having asynchronous read with fast read output
- Patent number 8,493,811
- Issue date Jul 23, 2013
- Apple Inc.
- Shinye Shiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic leakage control for memory arrays
- Patent number 8,134,874
- Issue date Mar 13, 2012
- Apple Inc.
- Shinye Shiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit with multiported memory supercell and data path...
- Patent number 8,036,061
- Issue date Oct 11, 2011
- Apple Inc.
- Shinye Shiu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Integrated DRAM with Low-Voltage Swing I/O
- Publication number 20180211946
- Publication date Jul 26, 2018
- Google LLC
- Shinye Shiu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transparent Hardware-Assisted Memory Decompression
- Publication number 20180095668
- Publication date Apr 5, 2018
- Google LLC
- Vyacheslav Malyugin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM ARCHITECTURE
- Publication number 20160350232
- Publication date Dec 1, 2016
- Google Inc.
- Allan D. KNIES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR TO MEMORY BYPASS
- Publication number 20160328322
- Publication date Nov 10, 2016
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSPARENT HARDWARE-ASSISTED MEMORY DECOMPRESSION
- Publication number 20160239209
- Publication date Aug 18, 2016
- Google Inc.
- Vyacheslav Vladimirovich MALYUGIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Power Savings in Idle Display Case
- Publication number 20160116969
- Publication date Apr 28, 2016
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE-ASSISTED MEMORY COMPRESSION MANAGEMENT USING PAGE FILTER A...
- Publication number 20160098356
- Publication date Apr 7, 2016
- Google Inc.
- Shinye SHIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND SYSTEMS FOR MEMORY DE-DUPLICATION
- Publication number 20160098353
- Publication date Apr 7, 2016
- Google Inc.
- Shinye SHIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MONITORING SYSTEM PERFORMANCE AND DYNAMICA...
- Publication number 20160098193
- Publication date Apr 7, 2016
- Google Inc.
- Shinye SHIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM FOR SHARING PRIVATE CACHES IN A SOC
- Publication number 20150143044
- Publication date May 21, 2015
- Apple Inc.
- Manu Gulati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Power Savings in Idle Display Case
- Publication number 20140337649
- Publication date Nov 13, 2014
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE ALLOCATION SCHEME OPTIMIZED FOR BROWSING APPLICATIONS
- Publication number 20140317355
- Publication date Oct 23, 2014
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COHERENCE PROCESSING WITH PRE-KILL MECHANISM TO AVOID DUPLICATED TR...
- Publication number 20140310469
- Publication date Oct 16, 2014
- Apple Inc.
- Erik P. Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADVANCED FINE-GRAINED CACHE POWER MANAGEMENT
- Publication number 20140298058
- Publication date Oct 2, 2014
- Apple Inc.
- Wolfgang H. Klingauf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADVANCED COARSE-GRAINED CACHE POWER MANAGEMENT
- Publication number 20140297959
- Publication date Oct 2, 2014
- Apple Inc.
- Shinye Shiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCHEME TO ESCALATE REQUESTS WITH ADDRESS CONFLICTS
- Publication number 20140244920
- Publication date Aug 28, 2014
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM CACHE WITH FINE GRAIN POWER MANAGEMENT
- Publication number 20140095777
- Publication date Apr 3, 2014
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM CACHE WITH STICKY REMOVAL ENGINE
- Publication number 20140095800
- Publication date Apr 3, 2014
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM CACHE WITH PARTIAL WRITE VALID STATES
- Publication number 20140089602
- Publication date Mar 27, 2014
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM CACHE WITH COARSE GRAIN POWER MANAGEMENT
- Publication number 20140089590
- Publication date Mar 27, 2014
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM CACHE WITH DATA PENDING STATE
- Publication number 20140089600
- Publication date Mar 27, 2014
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM CACHE WITH SPECULATIVE READ ENGINE
- Publication number 20140089592
- Publication date Mar 27, 2014
- Apple Inc.
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM CACHE WITH CACHE HINT CONTROL
- Publication number 20140075125
- Publication date Mar 13, 2014
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM CACHE WITH QUOTA-BASED CONTROL
- Publication number 20140075118
- Publication date Mar 13, 2014
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM CACHE WITH STICKY ALLOCATION
- Publication number 20140059297
- Publication date Feb 27, 2014
- Sukalpa Biswas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic Level Shifter Circuit and Ring Oscillator Using the Same
- Publication number 20130335152
- Publication date Dec 19, 2013
- James E. Burnette
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Dynamic Level Shifter
- Publication number 20120294095
- Publication date Nov 22, 2012
- Shinye Shiu
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Having Asynchronous Read With Fast Read Output
- Publication number 20110194370
- Publication date Aug 11, 2011
- Shinye Shiu
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT WITH MULTIPORTED MEMORY SUPERCELL AND DATA PATH...
- Publication number 20100208540
- Publication date Aug 19, 2010
- Shinye Shiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC LEAKAGE CONTROL FOR MEMORY ARRAYS
- Publication number 20100182850
- Publication date Jul 22, 2010
- Shinye Shiu
- G11 - INFORMATION STORAGE

Shinye Shiu

Person

Patents Grantslast 30 patents

Processor to memory with coherency bypass

Integrated DRAM with low-voltage swing I/O

Memory power savings in idle display case

Memory system architecture

Method and apparatus for monitoring system performance and dynamica...

Transparent hardware-assisted memory decompression

Methods and systems for memory de-duplication

Hardware-assisted memory compression management using page filter a...

Coherence processing with pre-kill mechanism to avoid duplicated tr...

Advanced fine-grained cache power management

Cache allocation scheme optimized for browsing applications

System cache with sticky allocation

Mechanism for sharing private caches in a SoC

Memory power savings in idle display case

System cache with partial write valid states

System cache with coarse grain power management

System cache with speculative read engine

System cache with cache hint control

Scheme to escalate requests with address conflicts

System cache with quota-based control

Advanced coarse-grained cache power management

System cache with fine grain power management

Dynamic level shifter circuit and ring oscillator using the same

System cache with sticky removal engine

Dynamic level shifter for interfacing signals referenced to differe...

Memory having asynchronous read with fast read output

Dynamic leakage control for memory arrays

Integrated circuit with multiported memory supercell and data path...

Patents Applicationslast 30 patents

Integrated DRAM with Low-Voltage Swing I/O

Transparent Hardware-Assisted Memory Decompression

MEMORY SYSTEM ARCHITECTURE

PROCESSOR TO MEMORY BYPASS

TRANSPARENT HARDWARE-ASSISTED MEMORY DECOMPRESSION

Memory Power Savings in Idle Display Case

HARDWARE-ASSISTED MEMORY COMPRESSION MANAGEMENT USING PAGE FILTER A...

METHODS AND SYSTEMS FOR MEMORY DE-DUPLICATION

METHOD AND APPARATUS FOR MONITORING SYSTEM PERFORMANCE AND DYNAMICA...

MECHANISM FOR SHARING PRIVATE CACHES IN A SOC

Memory Power Savings in Idle Display Case

CACHE ALLOCATION SCHEME OPTIMIZED FOR BROWSING APPLICATIONS

COHERENCE PROCESSING WITH PRE-KILL MECHANISM TO AVOID DUPLICATED TR...

ADVANCED FINE-GRAINED CACHE POWER MANAGEMENT

ADVANCED COARSE-GRAINED CACHE POWER MANAGEMENT

SCHEME TO ESCALATE REQUESTS WITH ADDRESS CONFLICTS

SYSTEM CACHE WITH FINE GRAIN POWER MANAGEMENT

SYSTEM CACHE WITH STICKY REMOVAL ENGINE

SYSTEM CACHE WITH PARTIAL WRITE VALID STATES

SYSTEM CACHE WITH COARSE GRAIN POWER MANAGEMENT

SYSTEM CACHE WITH DATA PENDING STATE

SYSTEM CACHE WITH SPECULATIVE READ ENGINE

SYSTEM CACHE WITH CACHE HINT CONTROL

SYSTEM CACHE WITH QUOTA-BASED CONTROL

SYSTEM CACHE WITH STICKY ALLOCATION

Dynamic Level Shifter Circuit and Ring Oscillator Using the Same

Dynamic Level Shifter

Memory Having Asynchronous Read With Fast Read Output

INTEGRATED CIRCUIT WITH MULTIPORTED MEMORY SUPERCELL AND DATA PATH...

DYNAMIC LEAKAGE CONTROL FOR MEMORY ARRAYS