Shiv Harit Mathur

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
PPA improvement for voltage mode driver and on-die termination (ODT)
- Patent number 12,191,854
- Issue date Jan 7, 2025
- SanDisk Technologies LLC
- Nirav Natwarbhai Patel
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed toggle mode transmitter with capacitive boosting
- Patent number 11,984,168
- Issue date May 14, 2024
- SANDISK TECHNOLOGIES LLC
- Nitin Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Two-stage high speed level shifter
- Patent number 11,916,549
- Issue date Feb 27, 2024
- SanDisk Technologies LLC
- Shiv Harit Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reference independent and noise insensitive glitch free clock multi...
- Patent number 11,803,207
- Issue date Oct 31, 2023
- SanDisk Technologies LLC
- Shiv Harit Mathur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Snapback electrostatic discharge protection for electronic circuits
- Patent number 11,539,207
- Issue date Dec 27, 2022
- Western Digital Technologies, Inc.
- Shiv Harit Mathur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual voltage high speed receiver with toggle mode
- Patent number 11,424,716
- Issue date Aug 23, 2022
- Western Digital Technologies, Inc.
- Shiv Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Electrostatic discharge protection circuit
- Patent number 11,222,889
- Issue date Jan 11, 2022
- Western Digital Technologies, Inc.
- Shiv Harit Mathur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High-level output voltage training for non-volatile memory
- Patent number 11,210,241
- Issue date Dec 28, 2021
- SanDisk Technologies LLC
- Nitin Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Snapback electrostatic discharge protection for electronic circuits
- Patent number 11,056,880
- Issue date Jul 6, 2021
- Western Digital Technologies, Inc.
- Shiv Harit Mathur
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Multi-level signaling scheme for memory interface
- Patent number 10,878,860
- Issue date Dec 29, 2020
- SanDisk Technologies LLC
- Nitin Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Transmitting DBI over strobe in nonvolatile memory
- Patent number 10,861,508
- Issue date Dec 8, 2020
- SanDisk Technologies LLC
- Shiv Mathur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for a reconfigurable controller bridge chip
- Patent number 10,838,901
- Issue date Nov 17, 2020
- SanDisk Technologies LLC
- Vijay Sukhlal Chinchole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuits for optimizing skew and duty cycle distortion between two...
- Patent number 10,727,825
- Issue date Jul 28, 2020
- SanDisk Technologies LLC
- Shiv Harit Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Auto-corrected IO driver architecture
- Patent number 10,673,434
- Issue date Jun 2, 2020
- SanDisk Technologies LLC
- Shiv Harit Mathur
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual voltage range CMOS receiver
- Patent number 10,637,446
- Issue date Apr 28, 2020
- SanDisk Technologies LLC
- Shiv Harit Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Loop delay optimization for multi-voltage self-synchronous systems
- Patent number 10,348,276
- Issue date Jul 9, 2019
- SanDisk Technologies LLC
- Shiv Harit Mathur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-die impedance calibration
- Patent number 10,224,928
- Issue date Mar 5, 2019
- Western Digital Technologies, Inc.
- Shiv Harit Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
ESD centric low-cost IO layout design topology
- Patent number 10,134,728
- Issue date Nov 20, 2018
- SanDisk Technologies LLC
- Shiv Harit Mathur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Skeleton I/O generation for early ESD analysis
- Patent number 9,996,655
- Issue date Jun 12, 2018
- SanDisk Technologies LLC
- Anand Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Loop delay optimization for multi-voltage self-synchronous systems
- Patent number 9,859,874
- Issue date Jan 2, 2018
- SanDisk Technologies LLC
- Shiv Harit Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus to tune a toggle mode interface
- Patent number 9,524,799
- Issue date Dec 20, 2016
- SanDisk Technologies LLC
- Sateesh Desireddi
- G11 - INFORMATION STORAGE
Information Patent Grant
Wide supply range high speed low-to-high level shifter
- Patent number 9,240,787
- Issue date Jan 19, 2016
- SanDisk Technologies Inc.
- Shiv Harit Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND METHOD FOR VALID WINDOW MAXIMIZATION IN TOGGLE MODE LINK...
- Publication number 20240403243
- Publication date Dec 5, 2024
- Western Digital Technologies, Inc.
- SHIV HARIT MATHUR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL REFERENCE ZQ CALIBRATION CIRCUITS AND METHODS
- Publication number 20240379138
- Publication date Nov 14, 2024
- Western Digital Technologies, Inc.
- Shiv Harit Mathur
- G11 - INFORMATION STORAGE
Information Patent Application
FAILSAFE MEMORY CARD ARCHITECTURE USING VOLTAGE DRIVER OUTPUT ENABL...
- Publication number 20240347120
- Publication date Oct 17, 2024
- SANDISK TECHNOLOGIES LLC
- SHIV HARIT MATHUR
- G11 - INFORMATION STORAGE
Information Patent Application
TRANSCEIVER ARCHITECTURE WITH LOW KICK-BACK NOISE AND PAD CAP
- Publication number 20240304615
- Publication date Sep 12, 2024
- SANDISK TECHNOLOGIES LLC
- SHIV HARIT MATHUR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW POWER AND AREA OPTIMIZED TM4 AND TM5 COMPLIANT COMBINATION TMIO...
- Publication number 20240220134
- Publication date Jul 4, 2024
- SANDISK TECHNOLOGIES LLC
- NIRAVKUMAR NATWARBHAI PATEL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PPA IMPROVEMENT FOR VOLTAGE MODE DRIVER AND ON-DIE TERMINATION (ODT)
- Publication number 20240097681
- Publication date Mar 21, 2024
- SANDISK TECHNOLOGIES LLC
- NIRAV NATWARBHAI PATEL
- G11 - INFORMATION STORAGE
Information Patent Application
TWO-STAGE HIGH SPEED LEVEL SHIFTER
- Publication number 20240072804
- Publication date Feb 29, 2024
- SHIV HARIT MATHUR
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH SPEED TOGGLE MODE TRANSMITTER WITH CAPACITIVE BOOSTING
- Publication number 20230402107
- Publication date Dec 14, 2023
- SANDISK TECHNOLOGIES LLC
- Nitin Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
REFERENCE INDEPENDENT AND NOISE INSENSITIVE GLITCH FREE CLOCK MULTI...
- Publication number 20230350453
- Publication date Nov 2, 2023
- SHIV HARIT MATHUR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ZERO STATIC CURRENT HIGH-SPEED VOLTAGE LEVEL SHIFTER
- Publication number 20230198524
- Publication date Jun 22, 2023
- Shiv Harit Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Dual Voltage High Speed Receiver with Toggle Mode
- Publication number 20220200533
- Publication date Jun 23, 2022
- Western Digital Technologies, Inc.
- Shiv Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Snapback Electrostatic Discharge Protection For Electronic Circuits
- Publication number 20210313802
- Publication date Oct 7, 2021
- Western Digital Technologies, Inc.
- Shiv Harit MATHUR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT
- Publication number 20200153241
- Publication date May 14, 2020
- Western Digital Technologies, Inc.
- Shiv Harit Mathur
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
AUTO-CORRECTED IO DRIVER ARCHITECTURE
- Publication number 20200106438
- Publication date Apr 2, 2020
- SANDISK TECHNOLOGIES LLC
- Shiv Harit Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CIRCUITS FOR OPTIMIZING SKEW AND DUTY CYCLE DISTORTION BETWEEN TWO...
- Publication number 20180302074
- Publication date Oct 18, 2018
- SanDisk Technologies LLC
- Shiv Harit Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DYNAMIC IMPEDANCE CONTROL FOR VOLTAGE MODE DRIVERS
- Publication number 20180302093
- Publication date Oct 18, 2018
- SanDisk Technologies LLC
- Shiv Harit Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOOP DELAY OPTIMIZATION FOR MULTI-VOLTAGE SELF-SYNCHRONOUS SYSTEMS
- Publication number 20180123570
- Publication date May 3, 2018
- SanDisk Technologies LLC
- Shiv Harit Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SKELETON I/O GENERATION FOR EARLY ESD ANALYSIS
- Publication number 20170255741
- Publication date Sep 7, 2017
- SanDisk Technologies LLC
- Anand Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ESD CENTRIC LOW-COST IO LAYOUT DESIGN TOPOLOGY
- Publication number 20170213817
- Publication date Jul 27, 2017
- SANDISK TECHNOLOGIES INC.
- Shiv Harit Mathur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ON-CHIP SELF CALIBRATION OF IO DRIVER IMPEDANCE FOR PVT VARIATION U...
- Publication number 20170123446
- Publication date May 4, 2017
- SANDISK TECHNOLOGIES INC.
- Gopikrishna Siddula
- G05 - CONTROLLING REGULATING
Information Patent Application
LOOP DELAY OPTIMIZATION FOR MULTI-VOLTAGE SELF-SYNCHRONOUS SYSTEMS
- Publication number 20170126213
- Publication date May 4, 2017
- SANDISK TECHNOLOGIES INC.
- Shiv Harit Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS TO TUNE A TOGGLE MODE INTERFACE
- Publication number 20160189758
- Publication date Jun 30, 2016
- SANDISK TECHNOLOGIES INC.
- Sateesh Desireddi
- G11 - INFORMATION STORAGE
Information Patent Application
CROSS-COUPLED LEVEL SHIFTER WITH TRANSITION TRACKING CIRCUITS
- Publication number 20160191059
- Publication date Jun 30, 2016
- SANDISK TECHNOLOGIES INC.
- Shiv Harit Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
WIDE SUPPLY RANGE HIGH SPEED LOW-TO-HIGH LEVEL SHIFTER
- Publication number 20150180474
- Publication date Jun 25, 2015
- SANDISK TECHNOLOGIES INC.
- Shiv Harit Mathur
- H03 - BASIC ELECTRONIC CIRCUITRY

Shiv Harit Mathur

Person

Patents Grantslast 30 patents

PPA improvement for voltage mode driver and on-die termination (ODT)

High speed toggle mode transmitter with capacitive boosting

Two-stage high speed level shifter

Reference independent and noise insensitive glitch free clock multi...

Snapback electrostatic discharge protection for electronic circuits

Dual voltage high speed receiver with toggle mode

Electrostatic discharge protection circuit

High-level output voltage training for non-volatile memory

Snapback electrostatic discharge protection for electronic circuits

Multi-level signaling scheme for memory interface

Transmitting DBI over strobe in nonvolatile memory

System and method for a reconfigurable controller bridge chip

Circuits for optimizing skew and duty cycle distortion between two...

Auto-corrected IO driver architecture

Dual voltage range CMOS receiver

Loop delay optimization for multi-voltage self-synchronous systems

On-die impedance calibration

ESD centric low-cost IO layout design topology

Skeleton I/O generation for early ESD analysis

Loop delay optimization for multi-voltage self-synchronous systems

Method and apparatus to tune a toggle mode interface

Wide supply range high speed low-to-high level shifter

Patents Applicationslast 30 patents

SYSTEM AND METHOD FOR VALID WINDOW MAXIMIZATION IN TOGGLE MODE LINK...

DUAL REFERENCE ZQ CALIBRATION CIRCUITS AND METHODS

FAILSAFE MEMORY CARD ARCHITECTURE USING VOLTAGE DRIVER OUTPUT ENABL...

TRANSCEIVER ARCHITECTURE WITH LOW KICK-BACK NOISE AND PAD CAP

LOW POWER AND AREA OPTIMIZED TM4 AND TM5 COMPLIANT COMBINATION TMIO...

PPA IMPROVEMENT FOR VOLTAGE MODE DRIVER AND ON-DIE TERMINATION (ODT)

TWO-STAGE HIGH SPEED LEVEL SHIFTER

HIGH SPEED TOGGLE MODE TRANSMITTER WITH CAPACITIVE BOOSTING

REFERENCE INDEPENDENT AND NOISE INSENSITIVE GLITCH FREE CLOCK MULTI...

ZERO STATIC CURRENT HIGH-SPEED VOLTAGE LEVEL SHIFTER

Dual Voltage High Speed Receiver with Toggle Mode

Snapback Electrostatic Discharge Protection For Electronic Circuits

ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT

AUTO-CORRECTED IO DRIVER ARCHITECTURE

CIRCUITS FOR OPTIMIZING SKEW AND DUTY CYCLE DISTORTION BETWEEN TWO...

DYNAMIC IMPEDANCE CONTROL FOR VOLTAGE MODE DRIVERS

LOOP DELAY OPTIMIZATION FOR MULTI-VOLTAGE SELF-SYNCHRONOUS SYSTEMS

SKELETON I/O GENERATION FOR EARLY ESD ANALYSIS

ESD CENTRIC LOW-COST IO LAYOUT DESIGN TOPOLOGY

ON-CHIP SELF CALIBRATION OF IO DRIVER IMPEDANCE FOR PVT VARIATION U...

LOOP DELAY OPTIMIZATION FOR MULTI-VOLTAGE SELF-SYNCHRONOUS SYSTEMS

METHOD AND APPARATUS TO TUNE A TOGGLE MODE INTERFACE

CROSS-COUPLED LEVEL SHIFTER WITH TRANSITION TRACKING CIRCUITS

WIDE SUPPLY RANGE HIGH SPEED LOW-TO-HIGH LEVEL SHIFTER