Shiva P. Gowni

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Static timing analysis with simulations on critical path netlists g...
- Patent number 6,553,549
- Issue date Apr 22, 2003
- Cypress Semiconductor Corp.
- Shiva P. Gowni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for the automated generation of programmable i...
- Patent number 6,357,035
- Issue date Mar 12, 2002
- Cypress Semiconductor Corp.
- Shiva P. Gowni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for the automated design of memory devices
- Patent number 6,295,627
- Issue date Sep 25, 2001
- Cypress Semiconductor Corporation
- Shiva P. Gowni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write enabling circuitry for a semiconductor memory
- Patent number 5,963,487
- Issue date Oct 5, 1999
- Cypress Semiconductor Corp.
- Shiva P. Gowni
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage level interface circuit with set-up and hold control
- Patent number 5,952,868
- Issue date Sep 14, 1999
- Cypress Semiconductor Corp.
- Shiva Gowni
- G11 - INFORMATION STORAGE
Information Patent Grant
Architecture and circuits for eliminating skews in PLDs
- Patent number 5,572,715
- Issue date Nov 5, 1996
- Cypress Semiconductor Corporation
- Shiva P. Gowni
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit for selective power-down of unused circuitry
- Patent number 4,963,769
- Issue date Oct 16, 1990
- Cypress Semiconductor
- W. Randolph Hiltpold
- H03 - BASIC ELECTRONIC CIRCUITRY

Shiva P. Gowni

Person

Patents Grantslast 30 patents

Static timing analysis with simulations on critical path netlists g...

Method and apparatus for the automated generation of programmable i...

Method and apparatus for the automated design of memory devices

Write enabling circuitry for a semiconductor memory

Voltage level interface circuit with set-up and hold control

Architecture and circuits for eliminating skews in PLDs

Circuit for selective power-down of unused circuitry