Shiyao Ge

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San Jose, CA, US

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Patents Applicationslast 30 patents

Information Patent Application
TESTBENCH FOR SUB-DESIGN VERIFICATION
- Publication number 20230252212
- Publication date Aug 10, 2023
- Xilinx, Inc.
- Rajvinder S. Klair
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR INTERFACING A TESTBENCH TO CIRCUIT SIMULATION
- Publication number 20230169226
- Publication date Jun 1, 2023
- Xilinx, Inc.
- Saikat Bandyopadhyay
- G06 - COMPUTING CALCULATING COUNTING