Sho-Shen Lee

Person

New Taipei City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Method for forming dynamic random access memory structure
- Patent number 10,763,264
- Issue date Sep 1, 2020
- United Microelectronics Corp.
- En-Chiuan Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming layout of semiconductor device
- Patent number 10,707,213
- Issue date Jul 7, 2020
- United Microelectronics Corp.
- Chia-Hung Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing method for semiconductor pattern
- Patent number 10,707,092
- Issue date Jul 7, 2020
- United Microelectronics Corp.
- Chia-Hung Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor pattern for monitoring overlay and critical dimension...
- Patent number 10,692,785
- Issue date Jun 23, 2020
- United Microelectronics Corp.
- Chien-Hao Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming overlay mark structure
- Patent number 10,529,667
- Issue date Jan 7, 2020
- United Microelectronics Corp.
- Zheng-Feng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dynamic random access memory structure and method for forming the same
- Patent number 10,453,849
- Issue date Oct 22, 2019
- United Microelectronics Corp.
- En-Chiuan Liou
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for monitoring semiconductor process
- Patent number 10,373,915
- Issue date Aug 6, 2019
- United Microelectronics Corp.
- Hsiao-Lin Hsu
- G01 - MEASURING TESTING
Information Patent Grant
Method for manufacturing semiconductor device
- Patent number 10,276,395
- Issue date Apr 30, 2019
- United Microelectronics Corp.
- Chien-Hao Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Measurement mark and method for monitoring semiconductor process
- Patent number 10,177,094
- Issue date Jan 8, 2019
- United Microelectronics Corp.
- Hsiao-Lin Hsu
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor pattern for monitoring overlay and critical dimension...
- Patent number 10,079,185
- Issue date Sep 18, 2018
- United Microelectronics Corp.
- Chien-Hao Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Overlay marks and semiconductor process using the overlay marks
- Patent number 9,490,217
- Issue date Nov 8, 2016
- United Microelectronics Corp.
- Chia-Ching Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Photomask and fabrication method thereof
- Patent number 9,304,389
- Issue date Apr 5, 2016
- United Microelectronics Corp.
- En-Chiuan Liou
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Calculation method for generating layout pattern in photomask
- Patent number 8,954,919
- Issue date Feb 10, 2015
- United Microelectronics Corp.
- En-Chiuan Liou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of forming assist feature patterns
- Patent number 8,524,423
- Issue date Sep 3, 2013
- United Microelectronics Corp.
- Yi-Chih Chiang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

Patents Applicationslast 30 patents

Information Patent Application
MANUFACTURING METHOD FOR SEMICONDUCTOR PATTERN
- Publication number 20200203176
- Publication date Jun 25, 2020
- UNITED MICROELECTRONICS CORP.
- Chia-Hung Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING LAYOUT OF SEMICONDUCTOR DEVICE
- Publication number 20200111791
- Publication date Apr 9, 2020
- UNITED MICROELECTRONICS CORP.
- Chia-Hung Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING DYNAMIC RANDOM ACCESS MEMORY STRUCTURE
- Publication number 20200013783
- Publication date Jan 9, 2020
- UNITED MICROELECTRONICS CORP.
- En-Chiuan Liou
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF FORMING OVERLAY MARK STRUCTURE
- Publication number 20200013724
- Publication date Jan 9, 2020
- UNITED MICROELECTRONICS CORP.
- Zheng-Feng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DYNAMIC RANDOM ACCESS MEMORY STRUCTURE AND METHOD FOR FORMING THE SAME
- Publication number 20190273083
- Publication date Sep 5, 2019
- UNITED MICROELECTRONICS CORP.
- En-Chiuan Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PATTERN FOR MONITORING OVERLAY AND CRITICAL DIMENSION...
- Publication number 20180374765
- Publication date Dec 27, 2018
- UNITED MICROELECTRONICS CORP.
- Chien-Hao Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
- Publication number 20180286692
- Publication date Oct 4, 2018
- UNITED MICROELECTRONICS CORP.
- Chien-Hao Chen
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
OVERLAY MARKS AND SEMICONDUCTOR PROCESS USING THE OVERLAY MARKS
- Publication number 20160307850
- Publication date Oct 20, 2016
- Chia-Ching Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PHOTOMASK AND FABRICATION METHOD THEREOF
- Publication number 20150118602
- Publication date Apr 30, 2015
- UNITED MICROELECTRONICS CORP.
- En-Chiuan Liou
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
METHOD OF FORMING ASSIST FEATURE PATTERNS
- Publication number 20130017474
- Publication date Jan 17, 2013
- Yi-Chih Chiang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

Sho-Shen Lee

Person

Patents Grantslast 30 patents

Method for forming dynamic random access memory structure

Method of forming layout of semiconductor device

Manufacturing method for semiconductor pattern

Semiconductor pattern for monitoring overlay and critical dimension...

Method of forming overlay mark structure

Dynamic random access memory structure and method for forming the same

Method for monitoring semiconductor process

Method for manufacturing semiconductor device

Measurement mark and method for monitoring semiconductor process

Semiconductor pattern for monitoring overlay and critical dimension...

Overlay marks and semiconductor process using the overlay marks

Photomask and fabrication method thereof

Calculation method for generating layout pattern in photomask

Method of forming assist feature patterns

Patents Applicationslast 30 patents

MANUFACTURING METHOD FOR SEMICONDUCTOR PATTERN

METHOD OF FORMING LAYOUT OF SEMICONDUCTOR DEVICE

METHOD FOR FORMING DYNAMIC RANDOM ACCESS MEMORY STRUCTURE

METHOD OF FORMING OVERLAY MARK STRUCTURE

DYNAMIC RANDOM ACCESS MEMORY STRUCTURE AND METHOD FOR FORMING THE SAME

SEMICONDUCTOR PATTERN FOR MONITORING OVERLAY AND CRITICAL DIMENSION...

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

OVERLAY MARKS AND SEMICONDUCTOR PROCESS USING THE OVERLAY MARKS

PHOTOMASK AND FABRICATION METHOD THEREOF

METHOD OF FORMING ASSIST FEATURE PATTERNS