Shu ZHOU

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Capacitor separations in dielectric layers
- Patent number 11,991,873
- Issue date May 21, 2024
- Intel Corporation
- Travis W. Lajoie
Information Patent Grant
Capacitor connections in dielectric layers
- Patent number 11,832,438
- Issue date Nov 28, 2023
- Intel Corporation
- Travis W. Lajoie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitor separations in dielectric layers
- Patent number 11,610,894
- Issue date Mar 21, 2023
- Intel Corporation
- Travis W. Lajoie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around integrated circuit structures having fin stack isol...
- Patent number 11,594,637
- Issue date Feb 28, 2023
- Intel Corporation
- Leonard P. Guler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
DEPOP using cyclic selective spacer etch
- Patent number 11,569,370
- Issue date Jan 31, 2023
- Intel Corporation
- Leonard P. Guler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of contact patterning of thin film transistors for embedded...
- Patent number 11,563,107
- Issue date Jan 24, 2023
- Intel Corporation
- Chieh-Jen Ku
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
AND DOUBLE PATTERNING STRATEGY WITH PRINTED ERASABLE DUMMIFICATION
- Publication number 20250006495
- Publication date Jan 2, 2025
- Intel Corporation
- Allen Gardiner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CAPACITOR CONNECTIONS IN DIELECTRIC LAYERS
- Publication number 20240049450
- Publication date Feb 8, 2024
- Intel Corporation
- Travis W. LAJOIE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIELECTRIC SIDEWALL FEATURES FOR TUNING THIN FILM TRANSISTOR (TFT)...
- Publication number 20230369501
- Publication date Nov 16, 2023
- Intel Corporation
- Cheng Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CAPACITOR SEPARATIONS IN DIELECTRIC LAYERS
- Publication number 20230200043
- Publication date Jun 22, 2023
- Intel Corporation
- Travis W. LAJOIE
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING FIN STACK ISOL...
- Publication number 20230163215
- Publication date May 25, 2023
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING FIN STACK ISOL...
- Publication number 20210305430
- Publication date Sep 30, 2021
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CAPACITOR SEPARATIONS IN DIELECTRIC LAYERS
- Publication number 20200411520
- Publication date Dec 31, 2020
- Intel Corporation
- Travis W. LAJOIE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AIR GAPS AND CAPACITORS IN DIELECTRIC LAYERS
- Publication number 20200411635
- Publication date Dec 31, 2020
- Intel Corporation
- Travis W. LAJOIE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CAPACITOR CONNECTIONS IN DIELECTRIC LAYERS
- Publication number 20200411525
- Publication date Dec 31, 2020
- Intel Corporation
- Travis W. LAJOIE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEPOP USING CYCLIC SELECTIVE SPACER ETCH
- Publication number 20200411661
- Publication date Dec 31, 2020
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF CONTACT PATTERNING OF THIN FILM TRANSISTORS FOR EMBEDDED...
- Publication number 20200303520
- Publication date Sep 24, 2020
- Intel Corporation
- Chieh-Jen KU
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Capacitor separations in dielectric layers

Capacitor connections in dielectric layers

Capacitor separations in dielectric layers

Gate-all-around integrated circuit structures having fin stack isol...

DEPOP using cyclic selective spacer etch

Method of contact patterning of thin film transistors for embedded...

Patents Applicationslast 30 patents

AND DOUBLE PATTERNING STRATEGY WITH PRINTED ERASABLE DUMMIFICATION

CAPACITOR CONNECTIONS IN DIELECTRIC LAYERS

DIELECTRIC SIDEWALL FEATURES FOR TUNING THIN FILM TRANSISTOR (TFT)...

CAPACITOR SEPARATIONS IN DIELECTRIC LAYERS

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING FIN STACK ISOL...

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING FIN STACK ISOL...

CAPACITOR SEPARATIONS IN DIELECTRIC LAYERS

AIR GAPS AND CAPACITORS IN DIELECTRIC LAYERS

CAPACITOR CONNECTIONS IN DIELECTRIC LAYERS

DEPOP USING CYCLIC SELECTIVE SPACER ETCH

METHOD OF CONTACT PATTERNING OF THIN FILM TRANSISTORS FOR EMBEDDED...