Shuangwu Huang

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and method of forming a thin wafer without a c...
- Patent number 9,842,775
- Issue date Dec 12, 2017
- STATS ChipPAC Pte. Ltd.
- Pandi C. Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of providing z-interconnect conduct...
- Patent number 9,640,504
- Issue date May 2, 2017
- STATS ChipPAC Pte. Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming a thin wafer without a c...
- Patent number 9,443,762
- Issue date Sep 13, 2016
- STATS ChipPAC Pte. Ltd.
- Pandi C. Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having a vertical interconnect structure using...
- Patent number 9,263,361
- Issue date Feb 16, 2016
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die and method of forming noise absorbing regions bet...
- Patent number 9,236,352
- Issue date Jan 12, 2016
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of providing Z-interconnect conduct...
- Patent number 8,742,579
- Issue date Jun 3, 2014
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming a thin wafer without a c...
- Patent number 8,531,015
- Issue date Sep 10, 2013
- STATS ChipPAC, Ltd.
- Pandi C. Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with shielded package and metho...
- Patent number 8,304,286
- Issue date Nov 6, 2012
- Stats Chippac Ltd.
- Reza Argenty Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Making a semiconductor device having conductive through organic vias
- Patent number 8,258,010
- Issue date Sep 4, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming vertical interconnect st...
- Patent number 8,193,034
- Issue date Jun 5, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of providing z-interconnect conduct...
- Patent number 8,133,762
- Issue date Mar 13, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die and method of forming noise absorbing regions bet...
- Patent number 8,093,151
- Issue date Jan 10, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming compliant polymer layer...
- Patent number 8,017,515
- Issue date Sep 13, 2011
- STATS ChipPAC, Ltd.
- Pandi C. Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Device and Method of Forming a Thin Wafer Without a C...
- Publication number 20160336230
- Publication date Nov 17, 2016
- STATS ChipPAC Pte Ltd.
- Pandi C. Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Providing Z-Interconnect Conduct...
- Publication number 20140203443
- Publication date Jul 24, 2014
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming a Thin Wafer Without a C...
- Publication number 20130285236
- Publication date Oct 31, 2013
- Pandi C. Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Die and Method of Forming through Organic Vias having...
- Publication number 20120280403
- Publication date Nov 8, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Die and Method of Forming through Organic Vias having...
- Publication number 20120280402
- Publication date Nov 8, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Vertical Interconnect St...
- Publication number 20120199972
- Publication date Aug 9, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Providing Z-Interconnect Conduct...
- Publication number 20120153472
- Publication date Jun 21, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Die and Method of Forming Noise Absorbing Regions Bet...
- Publication number 20120091567
- Publication date Apr 19, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHIELDED PACKAGE AND METHO...
- Publication number 20110140247
- Publication date Jun 16, 2011
- Reza Argenty Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming a Thin Wafer Without a C...
- Publication number 20100244241
- Publication date Sep 30, 2010
- STATS ChipPAC, Ltd.
- Pandi Chelvam Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Providing Z-Interconnect Conduct...
- Publication number 20100237495
- Publication date Sep 23, 2010
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Die and Method of Forming Through Organic Vias Having...
- Publication number 20100237471
- Publication date Sep 23, 2010
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Die and Method of Forming Noise Absorbing Regions Bet...
- Publication number 20100230822
- Publication date Sep 16, 2010
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Compliant Polymer Layer...
- Publication number 20100140752
- Publication date Jun 10, 2010
- STATS ChipPAC, Ltd.
- Pandi Chelvam Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Vertical Interconnect St...
- Publication number 20090261466
- Publication date Oct 22, 2009
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Encapsulated imager packaging
- Publication number 20090179290
- Publication date Jul 16, 2009
- Huang Shuangwu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multiple chip semiconductor package
- Publication number 20070059862
- Publication date Mar 15, 2007
- Meow Koon Eng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multiple chip semiconductor package and method of fabricating same
- Publication number 20050236709
- Publication date Oct 27, 2005
- Meow Koon Eng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of making multichip wafer level packages and computing syste...
- Publication number 20050116337
- Publication date Jun 2, 2005
- Swee Kwang Chua
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multichip wafer level packages and computing systems incorporating...
- Publication number 20050073029
- Publication date Apr 7, 2005
- Swee Kwang Chua
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multiple chip semiconductor package
- Publication number 20050006748
- Publication date Jan 13, 2005
- Meow Koon Eng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multichip wafer level system packages and methods of forming same
- Publication number 20040229400
- Publication date Nov 18, 2004
- Swee Kwang Chua
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multichip wafer level packages and computing systems incorporating...
- Publication number 20040046250
- Publication date Mar 11, 2004
- Swee Kwang Chua
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multiple chip semiconductor package and method of fabricating same
- Publication number 20040042190
- Publication date Mar 4, 2004
- Meow Koon Eng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-chip wafer level system packages and methods of forming same
- Publication number 20040043533
- Publication date Mar 4, 2004
- Swee Kwang Chua
- H01 - BASIC ELECTRIC ELEMENTS

Shuangwu Huang

Person

Patents Grantslast 30 patents

Semiconductor device and method of forming a thin wafer without a c...

Semiconductor device and method of providing z-interconnect conduct...

Semiconductor device and method of forming a thin wafer without a c...

Semiconductor device having a vertical interconnect structure using...

Semiconductor die and method of forming noise absorbing regions bet...

Semiconductor device and method of providing Z-interconnect conduct...

Semiconductor device and method of forming a thin wafer without a c...

Integrated circuit packaging system with shielded package and metho...

Making a semiconductor device having conductive through organic vias

Semiconductor device and method of forming vertical interconnect st...

Semiconductor device and method of providing z-interconnect conduct...

Semiconductor die and method of forming noise absorbing regions bet...

Semiconductor device and method of forming compliant polymer layer...

Patents Applicationslast 30 patents

Semiconductor Device and Method of Forming a Thin Wafer Without a C...

Semiconductor Device and Method of Providing Z-Interconnect Conduct...

Semiconductor Device and Method of Forming a Thin Wafer Without a C...

Semiconductor Die and Method of Forming through Organic Vias having...

Semiconductor Die and Method of Forming through Organic Vias having...

Semiconductor Device and Method of Forming Vertical Interconnect St...

Semiconductor Device and Method of Providing Z-Interconnect Conduct...

Semiconductor Die and Method of Forming Noise Absorbing Regions Bet...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHIELDED PACKAGE AND METHO...

Semiconductor Device and Method of Forming a Thin Wafer Without a C...

Semiconductor Device and Method of Providing Z-Interconnect Conduct...

Semiconductor Die and Method of Forming Through Organic Vias Having...

Semiconductor Die and Method of Forming Noise Absorbing Regions Bet...

Semiconductor Device and Method of Forming Compliant Polymer Layer...

Semiconductor Device and Method of Forming Vertical Interconnect St...

Encapsulated imager packaging

Multiple chip semiconductor package

Multiple chip semiconductor package and method of fabricating same

Method of making multichip wafer level packages and computing syste...

Multichip wafer level packages and computing systems incorporating...

Multiple chip semiconductor package

Multichip wafer level system packages and methods of forming same

Multichip wafer level packages and computing systems incorporating...

Multiple chip semiconductor package and method of fabricating same

Multi-chip wafer level system packages and methods of forming same