Shunsuke KODERA

Person

Yokohama Kanagawa, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Memory device that changes a writable region of a data buffer based...
- Patent number 10,769,011
- Issue date Sep 8, 2020
- TOSHIBA MEMORY CORPORATION
- Shunsuke Kodera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system storing block protection information
- Patent number 10,732,863
- Issue date Aug 4, 2020
- TOSHIBA MEMORY CORPORATION
- Shunsuke Kodera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device that changes a writable region of a data buffer based...
- Patent number 10,621,034
- Issue date Apr 14, 2020
- TOSHIBA MEMORY CORPORATION
- Shunsuke Kodera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage device compatible with selected one of multiple interface s...
- Patent number 10,489,088
- Issue date Nov 26, 2019
- TOSHIBA MEMORY CORPORATION
- Shunsuke Kodera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
NAND flash memory device
- Patent number 10,452,474
- Issue date Oct 22, 2019
- TOSHIBA MEMORY CORPORATION
- Wangying Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device that communicates error correction results to a host
- Patent number 10,445,174
- Issue date Oct 15, 2019
- TOSHIBA MEMORY CORPORATION
- Shunsuke Kodera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system that stores data redundantly
- Patent number 10,353,852
- Issue date Jul 16, 2019
- TOSHIBA MEMORY CORPORATION
- Shunsuke Kodera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system having a semiconductor memory device with protected b...
- Patent number 10,310,755
- Issue date Jun 4, 2019
- TOSHIBA MEMORY CORPORATION
- Shunsuke Kodera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device that updates parameters transmitted to a host based o...
- Patent number 10,289,482
- Issue date May 14, 2019
- TOSHIBA MEMORY CORPORATION
- Shunsuke Kodera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system having a semiconductor memory device with protected b...
- Patent number 10,235,070
- Issue date Mar 19, 2019
- TOSHIBA MEMORY CORPORATION
- Shunsuke Kodera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage device compatible with selected one of multiple interface s...
- Patent number 10,235,306
- Issue date Mar 19, 2019
- TOSHIBA MEMORY CORPORATION
- Shunsuke Kodera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system including test circuit
- Patent number 9,959,937
- Issue date May 1, 2018
- TOSHIBA MEMORY CORPORATION
- Kenichirou Kada
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device that communicates error correction results to a host
- Patent number 9,891,987
- Issue date Feb 13, 2018
- TOSHIBA MEMORY CORPORATION
- Shunsuke Kodera
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system
- Patent number 9,747,994
- Issue date Aug 29, 2017
- Kabushiki Kaisha Toshiba
- Hirosuke Narai
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system that handles access to bad blocks
- Patent number 9,728,275
- Issue date Aug 8, 2017
- Kabushiki Kaisha Toshiba
- Nobuhiro Tsuji
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device that performs an advance reading operation
- Patent number 9,620,230
- Issue date Apr 11, 2017
- Kabushiki Kaisha Toshiba
- Shinya Takeda
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR STORAGE DEVICE
- Publication number 20180276070
- Publication date Sep 27, 2018
- Toshiba Memory Corporation
- Wangying LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE DEVICE COMPATIBLE WITH SELECTED ONE OF MULTIPLE INTERFACE S...
- Publication number 20180113652
- Publication date Apr 26, 2018
- Toshiba Memory Corporation
- Shunsuke KODERA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE DEVICE COMPATIBLE WITH SELECTED ONE OF MULTIPLE INTERFACE S...
- Publication number 20180039583
- Publication date Feb 8, 2018
- Toshiba Memory Corporation
- Shunsuke KODERA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM STORING BLOCK PROTECTION INFORMATION
- Publication number 20180024763
- Publication date Jan 25, 2018
- Toshiba Memory Corporation
- Shunsuke KODERA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE THAT COMMUNICATES ERROR CORRECTION RESULTS TO A HOST
- Publication number 20170160946
- Publication date Jun 8, 2017
- Kabushiki Kaisha Toshiba
- Shunsuke KODERA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE THAT CHANGES A WRITABLE REGION OF A DATA BUFFER BASED...
- Publication number 20170161140
- Publication date Jun 8, 2017
- Kabushiki Kaisha Toshiba
- Shunsuke KODERA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM HAVING A SEMICONDUCTOR MEMORY DEVICE WITH PROTECTED B...
- Publication number 20170160972
- Publication date Jun 8, 2017
- Kabushiki Kaisha Toshiba
- Shunsuke KODERA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM
- Publication number 20170062066
- Publication date Mar 2, 2017
- Kabushiki Kaisha Toshiba
- Hirosuke NARAI
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE THAT UPDATES PARAMETERS TRANSMITTED TO A HOST BASED O...
- Publication number 20170060477
- Publication date Mar 2, 2017
- Kabushiki Kaisha Toshiba
- Shunsuke KODERA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM THAT HANDLES ACCESS TO BAD BLOCKS
- Publication number 20170062076
- Publication date Mar 2, 2017
- Kabushiki Kaisha Toshiba
- Nobuhiro TSUJI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM INCLUDING TEST CIRCUIT
- Publication number 20170062077
- Publication date Mar 2, 2017
- Kabushiki Kaisha Toshiba
- Kenichirou KADA
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM THAT STORES DATA REDUNDANTLY
- Publication number 20170060453
- Publication date Mar 2, 2017
- Kabushiki Kaisha Toshiba
- Shunsuke KODERA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE THAT CHANGES A WRITABLE REGION OF A DATA BUFFER BASED...
- Publication number 20170060682
- Publication date Mar 2, 2017
- Kabushiki Kaisha Toshiba
- Shunsuke KODERA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE THAT COMMUNICATES ERROR CORRECTION RESULTS TO A HOST
- Publication number 20170060676
- Publication date Mar 2, 2017
- Kabushiki Kaisha Toshiba
- Shunsuke KODERA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM HAVING A SEMICONDUCTOR MEMORY DEVICE WITH PROTECTED B...
- Publication number 20170060484
- Publication date Mar 2, 2017
- Kabushiki Kaisha Toshiba
- Shunsuke KODERA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE THAT PERFORMS AN ADVANCE READING OPERATION
- Publication number 20170062063
- Publication date Mar 2, 2017
- Kabushiki Kaisha Toshiba
- Shinya TAKEDA
- G11 - INFORMATION STORAGE

Shunsuke KODERA

Person

Patents Grantslast 30 patents

Memory device that changes a writable region of a data buffer based...

Memory system storing block protection information

Memory device that changes a writable region of a data buffer based...

Storage device compatible with selected one of multiple interface s...

NAND flash memory device

Memory device that communicates error correction results to a host

Memory system that stores data redundantly

Memory system having a semiconductor memory device with protected b...

Memory device that updates parameters transmitted to a host based o...

Memory system having a semiconductor memory device with protected b...

Storage device compatible with selected one of multiple interface s...

Memory system including test circuit

Memory device that communicates error correction results to a host

Memory system

Memory system that handles access to bad blocks

Memory device that performs an advance reading operation

Patents Applicationslast 30 patents

SEMICONDUCTOR STORAGE DEVICE

STORAGE DEVICE COMPATIBLE WITH SELECTED ONE OF MULTIPLE INTERFACE S...

STORAGE DEVICE COMPATIBLE WITH SELECTED ONE OF MULTIPLE INTERFACE S...

MEMORY SYSTEM STORING BLOCK PROTECTION INFORMATION

MEMORY DEVICE THAT COMMUNICATES ERROR CORRECTION RESULTS TO A HOST

MEMORY DEVICE THAT CHANGES A WRITABLE REGION OF A DATA BUFFER BASED...

MEMORY SYSTEM HAVING A SEMICONDUCTOR MEMORY DEVICE WITH PROTECTED B...

MEMORY SYSTEM

MEMORY DEVICE THAT UPDATES PARAMETERS TRANSMITTED TO A HOST BASED O...

MEMORY SYSTEM THAT HANDLES ACCESS TO BAD BLOCKS

MEMORY SYSTEM INCLUDING TEST CIRCUIT

MEMORY SYSTEM THAT STORES DATA REDUNDANTLY

MEMORY DEVICE THAT CHANGES A WRITABLE REGION OF A DATA BUFFER BASED...

MEMORY DEVICE THAT COMMUNICATES ERROR CORRECTION RESULTS TO A HOST

MEMORY SYSTEM HAVING A SEMICONDUCTOR MEMORY DEVICE WITH PROTECTED B...

MEMORY DEVICE THAT PERFORMS AN ADVANCE READING OPERATION