Shyamkumar Thoziyoor

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory system with adaptive refresh
- Patent number 12,038,855
- Issue date Jul 16, 2024
- QUALCOMM Incorporated
- Pankaj Deshmukh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible dual ranks memory system to boost performance
- Patent number 11,907,141
- Issue date Feb 20, 2024
- QUALCOMM Incorporated
- Jungwon Suh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing latency in pseudo channel based memory systems
- Patent number 11,893,240
- Issue date Feb 6, 2024
- QUALCOMM Incorporated
- Shyamkumar Thoziyoor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhanced data clock operations in memory
- Patent number 11,662,919
- Issue date May 30, 2023
- QUALCOMM Incorporated
- Jungwon Suh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dram-aware caching
- Patent number 11,520,706
- Issue date Dec 6, 2022
- QUALCOMM Incorporated
- Alain Artieri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory bank group interleaving
- Patent number 11,403,217
- Issue date Aug 2, 2022
- QUALCOMM Incorporated
- Alain Artieri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive memory access management
- Patent number 11,360,897
- Issue date Jun 14, 2022
- QUALCOMM Incorporated
- Jungwon Suh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhanced data clock operations in memory
- Patent number 11,175,836
- Issue date Nov 16, 2021
- QUALCOMM Incorporated
- Jungwon Suh
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY SYSTEM WITH ADAPTIVE REFRESH
- Publication number 20240311317
- Publication date Sep 19, 2024
- QUALCOMM Incorporated
- Pankaj Deshmukh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE-CORE MEMORY CONTROLLER
- Publication number 20240176751
- Publication date May 30, 2024
- QUALCOMM Incorporated
- Pankaj Deshmukh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING LATENCY IN PSEUDO CHANNEL BASED MEMORY SYSTEMS
- Publication number 20240111424
- Publication date Apr 4, 2024
- QUALCOMM Incorporated
- Shyamkumar THOZIYOOR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flexible Dual Ranks Memory System To Boost Performance
- Publication number 20240078202
- Publication date Mar 7, 2024
- QUALCOMM Incorporated
- Jungwon SUH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM WITH ADAPTIVE REFRESH
- Publication number 20230305971
- Publication date Sep 28, 2023
- QUALCOMM Incorporated
- Pankaj Deshmukh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reducing Latency In Pseudo Channel Based Memory Systems
- Publication number 20230136996
- Publication date May 4, 2023
- QUALCOMM Incorporated
- Shyamkumar THOZIYOOR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRAM-AWARE CACHING
- Publication number 20220350749
- Publication date Nov 3, 2022
- QUALCOMM Incorporated
- Alain ARTIERI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENHANCED DATA CLOCK OPERATIONS IN MEMORY
- Publication number 20220027067
- Publication date Jan 27, 2022
- QUALCOMM Incorporated
- Jungwon SUH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY BANK GROUP INTERLEAVING
- Publication number 20210133100
- Publication date May 6, 2021
- QUALCOMM Incorporated
- Alain ARTIERI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENHANCED DATA CLOCK OPERATIONS IN MEMORY
- Publication number 20200278802
- Publication date Sep 3, 2020
- QUALCOMM Incorporated
- Jungwon SUH
- G06 - COMPUTING CALCULATING COUNTING

Shyamkumar Thoziyoor

Person

Patents Grantslast 30 patents

Memory system with adaptive refresh

Flexible dual ranks memory system to boost performance

Reducing latency in pseudo channel based memory systems

Enhanced data clock operations in memory

Dram-aware caching

Memory bank group interleaving

Adaptive memory access management

Enhanced data clock operations in memory

Patents Applicationslast 30 patents

MEMORY SYSTEM WITH ADAPTIVE REFRESH

MULTIPLE-CORE MEMORY CONTROLLER

REDUCING LATENCY IN PSEUDO CHANNEL BASED MEMORY SYSTEMS

Flexible Dual Ranks Memory System To Boost Performance

MEMORY SYSTEM WITH ADAPTIVE REFRESH

Reducing Latency In Pseudo Channel Based Memory Systems

DRAM-AWARE CACHING

ENHANCED DATA CLOCK OPERATIONS IN MEMORY

MEMORY BANK GROUP INTERLEAVING

ENHANCED DATA CLOCK OPERATIONS IN MEMORY