Siamak Fazelpour

Person

Irvine, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Inductor embedded in a package substrate
- Patent number 10,008,316
- Issue date Jun 26, 2018
- QUALCOMM Incorporated
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power management integrated circuit (PMIC) integration into a proce...
- Patent number 9,536,805
- Issue date Jan 3, 2017
- QUALCOMM Incorporated
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and methods for shielding differential signal pin pairs
- Patent number 9,514,966
- Issue date Dec 6, 2016
- QUALCOMM Incorporated
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Highly coupled spiral planar inductors structure at bump to compens...
- Patent number 9,214,426
- Issue date Dec 15, 2015
- QUALCOMM Incorporated
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fanned out interconnect via structure for electronic package substr...
- Patent number 6,812,576
- Issue date Nov 2, 2004
- Applied Micro Circuits Corporation
- Siamak Fazelpour
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method for integrating passives on-die utilizing under bump metal a...
- Patent number 6,781,229
- Issue date Aug 24, 2004
- Skyworks Solutions, Inc.
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic package substrate with an upper dielectric layer coverin...
- Patent number 6,762,494
- Issue date Jul 13, 2004
- Applied Micro Circuits Corporation
- Siamak Fazelpour
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Electronic package with offset reference plane cutout
- Patent number 6,713,853
- Issue date Mar 30, 2004
- Applied Micro Circuits Corporation
- Siamak Fazelpour
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Controlled impedance transmission lines in a redistribution layer
- Patent number 6,674,174
- Issue date Jan 6, 2004
- Skyworks Solutions, Inc.
- Surasit Chungpaiboonpatana
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Voltage regulation for semiconductor dies and related structure
- Patent number 6,674,646
- Issue date Jan 6, 2004
- Skyworks Solutions, Inc.
- Khosrow Golshan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package substrate interconnect layout for providing bandpass/lowpas...
- Patent number 6,617,943
- Issue date Sep 9, 2003
- Applied Micro Circuits Corporation
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Exposed paddle leadframe for semiconductor die packaging
- Patent number 6,611,048
- Issue date Aug 26, 2003
- Skyworks Solutions, Inc.
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transformer comprising stacked inductors
- Patent number 6,608,363
- Issue date Aug 19, 2003
- Skyworks Solutions, Inc.
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Controlled impedance leads in a leadframe for high frequency applic...
- Patent number 6,576,983
- Issue date Jun 10, 2003
- Skyworks Solutions, Inc.
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic device package with high speed signal interconnect betwe...
- Patent number 6,566,761
- Issue date May 20, 2003
- Applied Micro Circuits Corporation
- Laxminarayan Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pin grid array package with controlled impedance pins
- Patent number 6,534,854
- Issue date Mar 18, 2003
- Conexant Systems, Inc.
- Siamak Fazelpour
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
High inductance inductor in a semiconductor package
- Patent number 6,512,285
- Issue date Jan 28, 2003
- Skyworks Solutions, Inc.
- Hassan S. Hashemi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for securing a molding compound to a leadframe...
- Patent number 6,501,158
- Issue date Dec 31, 2002
- Skyworks Solutions, Inc.
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic device attachment methods and apparatus for forming an a...
- Patent number 6,424,541
- Issue date Jul 23, 2002
- Conexant Systems, Inc.
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low inductance top metal layer design
- Patent number 6,274,925
- Issue date Aug 14, 2001
- Conexant Systems, Inc.
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INDUCTOR SYSTEM FOR MULTI-PHASE POWER MANAGEMENT INTEGRATED CIRCUITS
- Publication number 20160095225
- Publication date Mar 31, 2016
- QUALCOMM Incorporated
- Siamak FAZELPOUR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER MANAGEMENT INTEGRATED CIRCUIT (PMIC) INTEGRATION INTO A PROCE...
- Publication number 20160005715
- Publication date Jan 7, 2016
- QUALCOMM Incorporated
- Siamak FAZELPOUR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOOPED SOCKET PIN
- Publication number 20160006149
- Publication date Jan 7, 2016
- QUALCOMM Incorporated
- Siamak FAZELPOUR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CUSTOM ORIENTATION OF SOCKET PINS TO ACHIEVE HIGH ISOLATION BETWEEN...
- Publication number 20150372425
- Publication date Dec 24, 2015
- QUALCOMM Incorporated
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHODS FOR SHIELDING DIFFERENTIAL SIGNAL PIN PAIRS
- Publication number 20150294945
- Publication date Oct 15, 2015
- QUALCOMM Incorporated
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INDUCTOR EMBEDDED IN A PACKAGE SUBTRATE
- Publication number 20150279545
- Publication date Oct 1, 2015
- QUALCOMM Incorporated
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method suitable for forming a microelectronic device package
- Publication number 20040038451
- Publication date Feb 26, 2004
- Douglas A. Hawks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTROLLED IMPEDANCE TRANSMISSION LINES IN A REDISTRIBUTION LAYER
- Publication number 20030193078
- Publication date Oct 16, 2003
- Conexant Systems, Inc.
- Surasit Chungpaiboonpatana
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Shielding of RF devices
- Publication number 20020113309
- Publication date Aug 22, 2002
- Siamak Fazelpour
- H01 - BASIC ELECTRIC ELEMENTS

Siamak Fazelpour

Person

Patents Grantslast 30 patents

Inductor embedded in a package substrate

Power management integrated circuit (PMIC) integration into a proce...

Apparatus and methods for shielding differential signal pin pairs

Highly coupled spiral planar inductors structure at bump to compens...

Fanned out interconnect via structure for electronic package substr...

Method for integrating passives on-die utilizing under bump metal a...

Electronic package substrate with an upper dielectric layer coverin...

Electronic package with offset reference plane cutout

Controlled impedance transmission lines in a redistribution layer

Voltage regulation for semiconductor dies and related structure

Package substrate interconnect layout for providing bandpass/lowpas...

Exposed paddle leadframe for semiconductor die packaging

Transformer comprising stacked inductors

Controlled impedance leads in a leadframe for high frequency applic...

Electronic device package with high speed signal interconnect betwe...

Pin grid array package with controlled impedance pins

High inductance inductor in a semiconductor package

Structure and method for securing a molding compound to a leadframe...

Electronic device attachment methods and apparatus for forming an a...

Low inductance top metal layer design

Patents Applicationslast 30 patents

INDUCTOR SYSTEM FOR MULTI-PHASE POWER MANAGEMENT INTEGRATED CIRCUITS

POWER MANAGEMENT INTEGRATED CIRCUIT (PMIC) INTEGRATION INTO A PROCE...

LOOPED SOCKET PIN

CUSTOM ORIENTATION OF SOCKET PINS TO ACHIEVE HIGH ISOLATION BETWEEN...

APPARATUS AND METHODS FOR SHIELDING DIFFERENTIAL SIGNAL PIN PAIRS

INDUCTOR EMBEDDED IN A PACKAGE SUBTRATE

Method suitable for forming a microelectronic device package

CONTROLLED IMPEDANCE TRANSMISSION LINES IN A REDISTRIBUTION LAYER

Shielding of RF devices