Siegfried Kay Hesse

Person

Dresden, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Centralized MBIST failure information
- Patent number 8,392,777
- Issue date Mar 5, 2013
- Advanced Micro Devices, Inc.
- Wei-Yu Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Test algorithm selection in memory built-in self test controller
- Patent number 7,653,845
- Issue date Jan 26, 2010
- Advanced Micro Devices, Inc.
- Siegfried Kay Hesse
- G11 - INFORMATION STORAGE
Information Patent Grant
Extended host controller test mode support for use with full-speed...
- Patent number 7,225,288
- Issue date May 29, 2007
- Advanced Micro Devices, Inc.
- Stefan Schulze
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling the replacement of prefetched descriptors in a cache
- Patent number 7,194,583
- Issue date Mar 20, 2007
- Advanced Micro Devices, Inc.
- Siegfried Kay Hesse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serial bus host controller diagnosis
- Patent number 7,131,035
- Issue date Oct 31, 2006
- Advanced Micro Devices, Inc.
- Dale E. Gulick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transaction duration management in a USB host controller
- Patent number 6,990,550
- Issue date Jan 24, 2006
- Advanced Micro Devices, Inc.
- Siegfried Kay Hesse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reciprocally adjustable dual queue mechanism
- Patent number 6,944,725
- Issue date Sep 13, 2005
- Advanced Micro Devices, Inc.
- Siegfried Kay Hesse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DMA mechanism for high-speed packet bus
- Patent number 6,823,403
- Issue date Nov 23, 2004
- Advanced Micro Devices, Inc.
- Dale E. Gulick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Switching metal line configurations in metal layer structures
- Patent number 6,798,067
- Issue date Sep 28, 2004
- Advanced Micro Devices, Inc.
- Siegfried Kay Hesse
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
CENTRALIZED MBIST FAILURE INFORMATION
- Publication number 20110055644
- Publication date Mar 3, 2011
- Wei-Yu Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Test algorithm selection in memory built-in self test controller
- Publication number 20070204190
- Publication date Aug 30, 2007
- Advanced Micro Devices, Inc.
- Siegfried Kay Hesse
- G11 - INFORMATION STORAGE
Information Patent Application
Switching metal line configurations in metal layer structures
- Publication number 20040087132
- Publication date May 6, 2004
- Siegfried Kay Hesse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Extended host controller test mode support
- Publication number 20040078716
- Publication date Apr 22, 2004
- Stefan Schulze
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling the replacement of prefetched descriptors in a cache
- Publication number 20040030840
- Publication date Feb 12, 2004
- Advanced Micro Devices, Inc.
- Siegfried Kay Hesse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Serial bus host controller diagnosis
- Publication number 20040024920
- Publication date Feb 5, 2004
- Dale E. Gulick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Transaction duration management in a USB host controller
- Publication number 20030225957
- Publication date Dec 4, 2003
- Siegfried Kay Hesse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Queue mechanism
- Publication number 20030204686
- Publication date Oct 30, 2003
- Siegfried Kay Hesse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USB host controller
- Publication number 20030177297
- Publication date Sep 18, 2003
- Siegfried Kay Hesse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DMA mechanism for high-speed packet bus
- Publication number 20030172224
- Publication date Sep 11, 2003
- Dale E. Gulick
- G06 - COMPUTING CALCULATING COUNTING

Siegfried Kay Hesse

Person

Patents Grantslast 30 patents

Centralized MBIST failure information

Test algorithm selection in memory built-in self test controller

Extended host controller test mode support for use with full-speed...

Controlling the replacement of prefetched descriptors in a cache

Serial bus host controller diagnosis

Transaction duration management in a USB host controller

Reciprocally adjustable dual queue mechanism

DMA mechanism for high-speed packet bus

Switching metal line configurations in metal layer structures

Patents Applicationslast 30 patents

CENTRALIZED MBIST FAILURE INFORMATION

Test algorithm selection in memory built-in self test controller

Switching metal line configurations in metal layer structures

Extended host controller test mode support

Controlling the replacement of prefetched descriptors in a cache

Serial bus host controller diagnosis

Transaction duration management in a USB host controller

Queue mechanism

USB host controller

DMA mechanism for high-speed packet bus