Simon Li

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Synchronous wired-or ACK status for memory with variable write latency
- Patent number 11,973,153
- Issue date Apr 30, 2024
- RAMBUS INC.
- Yohan Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface with variable data rate
- Patent number 11,886,375
- Issue date Jan 30, 2024
- RAMBUS INC.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital signal processors providing scalable decision feedback equa...
- Patent number 11,838,153
- Issue date Dec 5, 2023
- Microsoft Technology Licensing, LLC
- Md Masum Hossain
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Interface with variable data rate
- Patent number 11,341,079
- Issue date May 24, 2022
- RAMBUS INC.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serial link receiver with improved bandwidth and accurate eye monitor
- Patent number 11,184,198
- Issue date Nov 23, 2021
- RAMBUS INC.
- Marko Aleksić
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Synchronous wired-OR ACK status for memory with variable write latency
- Patent number 11,101,393
- Issue date Aug 24, 2021
- RAMBUS INC.
- Yohan Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serial link receiver with improved bandwidth and accurate eye monitor
- Patent number 10,601,615
- Issue date Mar 24, 2020
- Rambus Inc.
- Marko Aleksić
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Synchronous wired-OR ACK status for memory with variable write latency
- Patent number 10,468,544
- Issue date Nov 5, 2019
- Rambus Inc.
- Yohan Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface with variable data rate
- Patent number 10,452,601
- Issue date Oct 22, 2019
- Rambus Inc.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase calibration of clock signals
- Patent number 10,367,636
- Issue date Jul 30, 2019
- Rambus Inc.
- Marko Aleksić
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Serial link receiver with improved bandwidth and accurate eye monitor
- Patent number 10,135,642
- Issue date Nov 20, 2018
- Rambus Inc.
- Marko Aleksić
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase calibration of clock signals
- Patent number 10,129,015
- Issue date Nov 13, 2018
- Rambus Inc.
- Marko Aleksić
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Interface with variable data rate
- Patent number 9,940,299
- Issue date Apr 10, 2018
- Rambus Inc.
- Yohan U. Frans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Phase calibration of clock signals
- Patent number 9,755,819
- Issue date Sep 5, 2017
- Rambus Inc.
- Marko Aleksić
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Interface with variable data rate
- Patent number 9,569,396
- Issue date Feb 14, 2017
- Rambus Inc.
- Yohan U. Frans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Synchronous wired-or ACK status for memory with variable write latency
- Patent number 9,515,204
- Issue date Dec 6, 2016
- Rambus Inc.
- Yohan Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Supporting calibration for sub-rate operation in clocked memory sys...
- Patent number 9,349,422
- Issue date May 24, 2016
- Rambus Inc.
- Akash Bansal
- G11 - INFORMATION STORAGE
Information Patent Grant
Levelization of memory interface for communicating with multiple me...
- Patent number 9,330,034
- Issue date May 3, 2016
- Rambus Inc.
- Yohan Usthavia Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface with variable data rate
- Patent number 9,178,647
- Issue date Nov 3, 2015
- Rambus Inc.
- Yohan U. Frans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Supporting calibration for sub-rate operation in clocked memory sys...
- Patent number 9,036,436
- Issue date May 19, 2015
- Rambus Inc.
- Akash Bansal
- G11 - INFORMATION STORAGE
Information Patent Grant
Interface with variable data rate
- Patent number 8,855,217
- Issue date Oct 7, 2014
- Rambus Inc.
- Yohan U. Frans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Interface with variable data rate
- Patent number 8,279,948
- Issue date Oct 2, 2012
- Rambus Inc.
- Yohan U. Frans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Through-core self-test with multiple loopbacks
- Patent number 7,346,819
- Issue date Mar 18, 2008
- Rambus Inc.
- Akash Bansal
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYNCHRONOUS WIRED-OR ACK STATUS FOR MEMORY WITH VARIABLE WRITE LATENCY
- Publication number 20240313135
- Publication date Sep 19, 2024
- Rambus Inc.
- Yohan Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interface with Variable Data Rate
- Publication number 20240264972
- Publication date Aug 8, 2024
- Rambus Inc.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interface with Variable Data Rate
- Publication number 20230051578
- Publication date Feb 16, 2023
- Rambus Inc.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONOUS WIRED-OR ACK STATUS FOR MEMORY WITH VARIABLE WRITE LATENCY
- Publication number 20220077327
- Publication date Mar 10, 2022
- Rambus Inc.
- Yohan Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Serial Link Receiver with Improved Bandwidth and Accurate Eye Monitor
- Publication number 20200295974
- Publication date Sep 17, 2020
- RAMBUS INC.
- Marko Aleksic
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYNCHRONOUS WIRED-OR ACK STATUS FOR MEMORY WITH VARIABLE WRITE LATENCY
- Publication number 20200176617
- Publication date Jun 4, 2020
- RAMBUS INC.
- Yohan Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interface with Variable Data Rate
- Publication number 20200159688
- Publication date May 21, 2020
- RAMBUS INC.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHASE CALIBRATION OF CLOCK SIGNALS
- Publication number 20190173661
- Publication date Jun 6, 2019
- RAMBUS INC.
- Marko Aleksic
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Serial Link Receiver with Improved Bandwidth and Accurate Eye Monitor
- Publication number 20190149366
- Publication date May 16, 2019
- RAMBUS INC.
- Marko Aleksic
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Interface with Variable Data Rate
- Publication number 20180329859
- Publication date Nov 15, 2018
- RAMBUS INC.
- Yohan U. Frans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PHASE CALIBRATION OF CLOCK SIGNALS
- Publication number 20180013544
- Publication date Jan 11, 2018
- RAMBUS INC.
- Marko Aleksic
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Serial Link Receiver with Improved Bandwidth and Accurate Eye Monitor
- Publication number 20170250840
- Publication date Aug 31, 2017
- RAMBUS INC.
- Marko Aleksic
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Interface with Variable Data Rate
- Publication number 20170177540
- Publication date Jun 22, 2017
- RAMBUS INC.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONOUS WIRED-OR ACK STATUS FOR MEMORY WITH VARIABLE WRITE LATENCY
- Publication number 20170147234
- Publication date May 25, 2017
- RAMBUS INC.
- Yohan Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Phase Calibration of Clock Signals
- Publication number 20170005785
- Publication date Jan 5, 2017
- RAMBUS INC.
- Marko Aleksic
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Interface with Variable Data Rate
- Publication number 20160124895
- Publication date May 5, 2016
- RAMBUS INC.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Supporting Calibration For Sub-Rate Operation In Clocked Memory Sys...
- Publication number 20150310903
- Publication date Oct 29, 2015
- RAMBUS INC.
- Akash Bansal
- G11 - INFORMATION STORAGE
Information Patent Application
Interface with Variable Data Rate
- Publication number 20150092869
- Publication date Apr 2, 2015
- RAMBUS INC.
- Yohan U. Frans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYNCHRONOUS WIRED-OR ACK STATUS FOR MEMORY WITH VARIABLE WRITE LATENCY
- Publication number 20140047158
- Publication date Feb 13, 2014
- Yohan Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Supporting Calibration For Sub-Rate Operation In Clocked Memory Sys...
- Publication number 20130301368
- Publication date Nov 14, 2013
- RAMBUS INC.
- Akash Bansal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interface with Variable Data Rate
- Publication number 20130148709
- Publication date Jun 13, 2013
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Levelization of Memory Interface for Communicating with Multiple Me...
- Publication number 20130013878
- Publication date Jan 10, 2013
- RAMBUS INC.
- Yohan Usthavia Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interface With Variable Data Rate
- Publication number 20100103994
- Publication date Apr 29, 2010
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Signaling system with data correlation detection
- Publication number 20070047635
- Publication date Mar 1, 2007
- Vladimir M. Stojanovic
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Through-core self-test with multiple loopbacks
- Publication number 20060107154
- Publication date May 18, 2006
- Akash Bansal
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Synchronous wired-or ACK status for memory with variable write latency

Interface with variable data rate

Digital signal processors providing scalable decision feedback equa...

Interface with variable data rate

Serial link receiver with improved bandwidth and accurate eye monitor

Synchronous wired-OR ACK status for memory with variable write latency

Serial link receiver with improved bandwidth and accurate eye monitor

Synchronous wired-OR ACK status for memory with variable write latency

Interface with variable data rate

Phase calibration of clock signals

Serial link receiver with improved bandwidth and accurate eye monitor

Phase calibration of clock signals

Interface with variable data rate

Phase calibration of clock signals

Interface with variable data rate

Synchronous wired-or ACK status for memory with variable write latency

Supporting calibration for sub-rate operation in clocked memory sys...

Levelization of memory interface for communicating with multiple me...

Interface with variable data rate

Supporting calibration for sub-rate operation in clocked memory sys...

Interface with variable data rate

Interface with variable data rate

Through-core self-test with multiple loopbacks

Patents Applicationslast 30 patents

SYNCHRONOUS WIRED-OR ACK STATUS FOR MEMORY WITH VARIABLE WRITE LATENCY

Interface with Variable Data Rate

Interface with Variable Data Rate

SYNCHRONOUS WIRED-OR ACK STATUS FOR MEMORY WITH VARIABLE WRITE LATENCY

Serial Link Receiver with Improved Bandwidth and Accurate Eye Monitor

SYNCHRONOUS WIRED-OR ACK STATUS FOR MEMORY WITH VARIABLE WRITE LATENCY

Interface with Variable Data Rate

PHASE CALIBRATION OF CLOCK SIGNALS

Serial Link Receiver with Improved Bandwidth and Accurate Eye Monitor

Interface with Variable Data Rate

PHASE CALIBRATION OF CLOCK SIGNALS

Serial Link Receiver with Improved Bandwidth and Accurate Eye Monitor

Interface with Variable Data Rate

SYNCHRONOUS WIRED-OR ACK STATUS FOR MEMORY WITH VARIABLE WRITE LATENCY

Phase Calibration of Clock Signals

Interface with Variable Data Rate

Supporting Calibration For Sub-Rate Operation In Clocked Memory Sys...

Interface with Variable Data Rate

SYNCHRONOUS WIRED-OR ACK STATUS FOR MEMORY WITH VARIABLE WRITE LATENCY

Supporting Calibration For Sub-Rate Operation In Clocked Memory Sys...

Interface with Variable Data Rate

Levelization of Memory Interface for Communicating with Multiple Me...

Interface With Variable Data Rate

Signaling system with data correlation detection

Through-core self-test with multiple loopbacks