Simon S. Chan

Person

Belmont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Non-volatile memory with silicided bit line contacts
- Patent number 11,183,509
- Issue date Nov 23, 2021
- Cypress Semiconductor Corporation
- Ching-Huang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory with silicided bit line contacts
- Patent number 10,692,877
- Issue date Jun 23, 2020
- Cypress Semiconductor Corporation
- Ching-Huang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned trench isolation in integrated circuits
- Patent number 10,256,137
- Issue date Apr 9, 2019
- Cypress Semiconductor Corporation
- Ching-Huang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned trench isolation in integrated circuits
- Patent number 9,831,114
- Issue date Nov 28, 2017
- Cypress Semiconductor Corporation
- Ching-Huang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried hard mask for embedded semiconductor device patterning
- Patent number 9,673,206
- Issue date Jun 6, 2017
- Cypress Semiconductor Corporation
- Scott A. Bell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory with silicided bit line contacts
- Patent number 9,666,591
- Issue date May 30, 2017
- Cypress Semiconductor Corporation
- Ching-Huang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned trench isolation in integrated circuits
- Patent number 9,437,470
- Issue date Sep 6, 2016
- Cypress Semiconductor Corporation
- Ching-Huang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrating transistors with different poly-silicon heights on the...
- Patent number 9,431,503
- Issue date Aug 30, 2016
- Cypress Semiconductor Corporation
- Chuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried hard mask for embedded semiconductor device patterning
- Patent number 9,318,498
- Issue date Apr 19, 2016
- Cypress Semiconductor Corporation
- Scott A. Bell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory with silicided bit line contacts
- Patent number 9,252,154
- Issue date Feb 2, 2016
- Cypress Semiconductor Corporation
- Ching-Huang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried trench isolation in integrated circuits
- Patent number 9,252,026
- Issue date Feb 2, 2016
- Cypress Semiconductor Corporation
- Rinji Sugino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-Volatile memory with silicided bit line contacts
- Patent number 8,866,213
- Issue date Oct 21, 2014
- Spansion LLC
- Ching-Huang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High ultraviolet light absorbance silicon oxynitride film for impro...
- Patent number 8,735,960
- Issue date May 27, 2014
- Spansion LLC
- Minh Q. Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrating transistors with different poly-silicon heights on the...
- Patent number 8,652,907
- Issue date Feb 18, 2014
- Spansion LLC
- Chuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Local interconnect having increased misalignment tolerance
- Patent number 8,617,983
- Issue date Dec 31, 2013
- Spansion LLC
- Simon S. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and manufacture for embedded flash to achieve high quality s...
- Patent number 8,598,005
- Issue date Dec 3, 2013
- Spansion LLC
- Simon Siu-Sing Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Local interconnect having increased misalignment tolerance
- Patent number 8,314,454
- Issue date Nov 20, 2012
- Spansion LLC
- Simon S. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Local interconnect having increased misalignment tolerance
- Patent number 8,283,249
- Issue date Oct 9, 2012
- Spansion LLC
- Simon S. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming silicides of different thicknesses on different...
- Patent number 8,236,693
- Issue date Aug 7, 2012
- Advanced Micro Devices, Inc.
- Wen Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Local interconnect having increased misalignment tolerance
- Patent number 7,879,718
- Issue date Feb 1, 2011
- Spansion LLC
- Simon S. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Two-bit memory cell having conductive charge storage segments and m...
- Patent number 7,538,383
- Issue date May 26, 2009
- Spansion LLC
- Meng Ding
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced etching of a high dielectric constant layer
- Patent number 7,498,222
- Issue date Mar 3, 2009
- Advanced Micro Devices, Inc.
- John C. Foster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolation region bird's beak suppression
- Patent number 7,465,644
- Issue date Dec 16, 2008
- Advanced Micro Devices, Inc.
- Simon S. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SONOS memory cell having high-K dielectric
- Patent number 7,446,369
- Issue date Nov 4, 2008
- Spansion, LLC
- Takashi Whitney Orimoto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Oxygen elimination for device processing
- Patent number 7,381,620
- Issue date Jun 3, 2008
- Spansion LLC
- Boon-Yong Ang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor substrate layer configured for inducement of compress...
- Patent number 7,265,420
- Issue date Sep 4, 2007
- Advanced Micro Devices, Inc.
- Mario M. Pelella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bond pad structure for copper metallization having increased reliab...
- Patent number 7,242,102
- Issue date Jul 10, 2007
- Spansion LLC
- Inkuk Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor component and method of manufacture
- Patent number 7,223,640
- Issue date May 29, 2007
- Advanced Micro Devices, Inc.
- Mario M. Pelella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor substrate and processes therefor
- Patent number 7,144,818
- Issue date Dec 5, 2006
- Advanced Micro Devices, Inc.
- Mario M. Pelella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for achieving increased control over interconnect line thick...
- Patent number 7,122,465
- Issue date Oct 17, 2006
- Spansion LLC
- Boon-Yong Ang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Buried Trench Isolation in Integrated Circuits
- Publication number 20190198611
- Publication date Jun 27, 2019
- CYPRESS SEMICONDUCTOR CORPORATION
- Rinji Sugino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED TRENCH ISOLATION IN INTEGRATED CIRCUITS
- Publication number 20180166323
- Publication date Jun 14, 2018
- CYPRESS SEMICONDUCTOR CORPORATION
- Ching-Huang LU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Non-Volatile Memory With Silicided Bit Line Contacts
- Publication number 20170250192
- Publication date Aug 31, 2017
- CYPRESS SEMICONDUCTOR CORPORATION
- Ching-Huang LU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Buried Hard Mask for Embedded Semiconductor Device Patterning
- Publication number 20160300844
- Publication date Oct 13, 2016
- CYPRESS SEMICONDUCTOR CORPORATION
- Scott A. Bell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Non-Volatile Memory With Silicided Bit Line Contacts
- Publication number 20160211271
- Publication date Jul 21, 2016
- CYPRESS SEMICONDUCTOR CORPORATION
- Ching-Huang LU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Buried Trench Isolation in Integrated Circuits
- Publication number 20160211321
- Publication date Jul 21, 2016
- CYPRESS SEMICONDUCTOR CORPORATION
- Rinji Sugino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Buried Trench Isolation in Integrated Circuits
- Publication number 20150262838
- Publication date Sep 17, 2015
- SPANSION LLC
- Rinji Sugino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BURIED TRENCH ISOLATION IN INTEGRATED CIRCUITS
- Publication number 20150097224
- Publication date Apr 9, 2015
- SPANSION LLC
- Lei XUE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED TRENCH ISOLATION IN INTEGRATED CIRCUITS
- Publication number 20150097245
- Publication date Apr 9, 2015
- SPANSION LLC
- Ching-Huang LU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Non-Volatile Memory With Silicided Bit Line Contacts
- Publication number 20150017795
- Publication date Jan 15, 2015
- SPANSION LLC
- Ching-Huang LU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Non-Volatile Memory With Silicided Bit Line Contacts
- Publication number 20140209993
- Publication date Jul 31, 2014
- SPANSION LLC
- Ching-Huang LU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Buried Hard Mask for Embedded Semiconductor Device Patterning
- Publication number 20140193972
- Publication date Jul 10, 2014
- SPANSION LLC
- Scott A. BELL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATING TRANSISTORS WITH DIFFERENT POLY-SILICON HEIGHTS ON THE...
- Publication number 20140117435
- Publication date May 1, 2014
- SPANSION LLC
- Chuan LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND MANUFACTURE FOR EMBEDDED FLASH TO ACHIEVE HIGH QUALITY S...
- Publication number 20130023101
- Publication date Jan 24, 2013
- SPANSION LLC
- Simon Siu-Sing Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE
- Publication number 20130005138
- Publication date Jan 3, 2013
- SPANSION LLC
- Simon S. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE
- Publication number 20130001700
- Publication date Jan 3, 2013
- SPANSION LLC
- Simon S. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATING TRANSISTORS WITH DIFFERENT POLY-SILICON HEIGHTS ON THE...
- Publication number 20120241871
- Publication date Sep 27, 2012
- SPANSION LLC
- Chuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE
- Publication number 20110129976
- Publication date Jun 2, 2011
- SPANSION LLC
- Simon S. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE
- Publication number 20110084330
- Publication date Apr 14, 2011
- SPANSION LLC
- Simon S. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High ultraviolet light absorbance silicon oxynitride film for impro...
- Publication number 20100123178
- Publication date May 20, 2010
- Minh Q. Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING DEPOSITING LAYERS...
- Publication number 20090050471
- Publication date Feb 26, 2009
- SPANSION LLC
- Robert J. Chiu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING SILICIDES OF DIFFERENT THICKNESSES ON DIFFERENT...
- Publication number 20080286921
- Publication date Nov 20, 2008
- Advanced Micro Devices, Inc.
- Wen Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE
- Publication number 20080157160
- Publication date Jul 3, 2008
- SPANSION LLC
- Simon S. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT ELIMINATING SOURCE/DRAIN JUNCTION SPIKING
- Publication number 20070085149
- Publication date Apr 19, 2007
- Advanced Micro Devices, Inc.
- Simon Siu-Sing Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SONOS memory cell having high-K dielectric
- Publication number 20070029601
- Publication date Feb 8, 2007
- Takashi Whitney Orimoto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-silicide system in integrated circuit technology
- Publication number 20060267087
- Publication date Nov 30, 2006
- Advanced Micro Devices, Inc.
- Robert J. Chiu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTABLE OPEN CIRCUIT AND ANTI-FUSE ELEMENT
- Publication number 20060208321
- Publication date Sep 21, 2006
- Advanced Micro Devices, Inc.
- Darin A. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor component and method of manufacture
- Publication number 20060197154
- Publication date Sep 7, 2006
- Advanced Micro Devices, Inc.
- Mario M. Pelella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Bond pad structure for copper metallization having increased reliab...
- Publication number 20060006552
- Publication date Jan 12, 2006
- FASL, LLC.
- Inkuk Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor substrate layer configured for inducement of compress...
- Publication number 20050263753
- Publication date Dec 1, 2005
- Advanced Micro Devices, Inc.
- Mario M. Pelella
- H01 - BASIC ELECTRIC ELEMENTS

Simon S. Chan

Person

Patents Grantslast 30 patents

Non-volatile memory with silicided bit line contacts

Non-volatile memory with silicided bit line contacts

Self-aligned trench isolation in integrated circuits

Self-aligned trench isolation in integrated circuits

Buried hard mask for embedded semiconductor device patterning

Non-volatile memory with silicided bit line contacts

Self-aligned trench isolation in integrated circuits

Integrating transistors with different poly-silicon heights on the...

Buried hard mask for embedded semiconductor device patterning

Non-volatile memory with silicided bit line contacts

Buried trench isolation in integrated circuits

Non-Volatile memory with silicided bit line contacts

High ultraviolet light absorbance silicon oxynitride film for impro...

Integrating transistors with different poly-silicon heights on the...

Local interconnect having increased misalignment tolerance

Method and manufacture for embedded flash to achieve high quality s...

Local interconnect having increased misalignment tolerance

Local interconnect having increased misalignment tolerance

Methods of forming silicides of different thicknesses on different...

Local interconnect having increased misalignment tolerance

Two-bit memory cell having conductive charge storage segments and m...

Enhanced etching of a high dielectric constant layer

Isolation region bird's beak suppression

SONOS memory cell having high-K dielectric

Oxygen elimination for device processing

Semiconductor substrate layer configured for inducement of compress...

Bond pad structure for copper metallization having increased reliab...

Semiconductor component and method of manufacture

Semiconductor substrate and processes therefor

Method for achieving increased control over interconnect line thick...

Patents Applicationslast 30 patents

Buried Trench Isolation in Integrated Circuits

SELF-ALIGNED TRENCH ISOLATION IN INTEGRATED CIRCUITS

Non-Volatile Memory With Silicided Bit Line Contacts

Buried Hard Mask for Embedded Semiconductor Device Patterning

Non-Volatile Memory With Silicided Bit Line Contacts

Buried Trench Isolation in Integrated Circuits

Buried Trench Isolation in Integrated Circuits

BURIED TRENCH ISOLATION IN INTEGRATED CIRCUITS

SELF-ALIGNED TRENCH ISOLATION IN INTEGRATED CIRCUITS

Non-Volatile Memory With Silicided Bit Line Contacts

Non-Volatile Memory With Silicided Bit Line Contacts

Buried Hard Mask for Embedded Semiconductor Device Patterning

INTEGRATING TRANSISTORS WITH DIFFERENT POLY-SILICON HEIGHTS ON THE...

METHOD AND MANUFACTURE FOR EMBEDDED FLASH TO ACHIEVE HIGH QUALITY S...

LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE

LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE

INTEGRATING TRANSISTORS WITH DIFFERENT POLY-SILICON HEIGHTS ON THE...

LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE

LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE

High ultraviolet light absorbance silicon oxynitride film for impro...

PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING DEPOSITING LAYERS...

METHODS OF FORMING SILICIDES OF DIFFERENT THICKNESSES ON DIFFERENT...

LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE

INTEGRATED CIRCUIT ELIMINATING SOURCE/DRAIN JUNCTION SPIKING

SONOS memory cell having high-K dielectric

Multi-silicide system in integrated circuit technology

SELECTABLE OPEN CIRCUIT AND ANTI-FUSE ELEMENT

Semiconductor component and method of manufacture

Bond pad structure for copper metallization having increased reliab...

Semiconductor substrate layer configured for inducement of compress...