Sivaramakrishnan SUBRAMANIAN

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Bangalore, IN

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Patents Grantslast 30 patents

Information Patent Grant
Physical interface and associated signal processing method for cloc...
- Patent number 11,935,577
- Issue date Mar 19, 2024
- Faraday Technology Corp.
- Sridhar Cheruku
- G11 - INFORMATION STORAGE
Information Patent Grant
Duty-cycle correction circuit for DDR devices
- Patent number 11,005,468
- Issue date May 11, 2021
- Faraday Technology Corp.
- Sivaramakrishnan Subramanian
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Calibration of delay chains
- Patent number 8,773,185
- Issue date Jul 8, 2014
- ARM Limited
- Sivaramakrishnan Subramanian
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reduced quantization error I/O resistor calibrator
- Patent number 8,427,198
- Issue date Apr 23, 2013
- ARM Limited
- Sridhar Cheruku
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
VOLTAGE REGULATOR TO PREVENT VOLTAGE DROP IN REGULATED VOLTAGE FOR...
- Publication number 20240192714
- Publication date Jun 13, 2024
- FARADAY TECHNOLOGY CORP.
- Sivaramakrishnan Subramanian
- G05 - CONTROLLING REGULATING
Information Patent Application
PHYSICAL INTERFACE AND ASSOCIATED SIGNAL PROCESSING METHOD FOR CLOC...
- Publication number 20230253028
- Publication date Aug 10, 2023
- FARADAY TECHNOLOGY CORP.
- Sridhar Cheruku
- G11 - INFORMATION STORAGE
Information Patent Application
CALIBRATION OF DELAY CHAINS
- Publication number 20140139277
- Publication date May 22, 2014
- ARM Limited
- Sivaramakrishnan SUBRAMANIAN
- H03 - BASIC ELECTRONIC CIRCUITRY