Sri Ranga Sai Boyapati

Person

Chandler, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit package supports
- Patent number 12,176,223
- Issue date Dec 24, 2024
- Intel Corporation
- Kristof Kuwawi Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic device with embedded die substrate on interposer
- Patent number 12,046,560
- Issue date Jul 23, 2024
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface finishes with low RBTV for fine and mixed bump pitch archit...
- Patent number 11,935,857
- Issue date Mar 19, 2024
- Intel Corporation
- Kristof Darmawaikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic structures including bridges
- Patent number 11,923,307
- Issue date Mar 5, 2024
- Intel Corporation
- Bai Nie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip package with high density interconnects
- Patent number 11,908,802
- Issue date Feb 20, 2024
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sacrificial dielectric for lithographic via formation to enable via...
- Patent number 11,908,821
- Issue date Feb 20, 2024
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die interconnect substrate, an electrical device and a method for f...
- Patent number 11,901,296
- Issue date Feb 13, 2024
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
In-package RF waveguides as high bandwidth chip-to-chip interconnec...
- Patent number 11,894,324
- Issue date Feb 6, 2024
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic device with embedded die substrate on interposer
- Patent number 11,894,311
- Issue date Feb 6, 2024
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Patch accommodating embedded dies having different thicknesses
- Patent number 11,862,619
- Issue date Jan 2, 2024
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package supports
- Patent number 11,854,834
- Issue date Dec 26, 2023
- Intel Corporation
- Kristof Kuwawi Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate with variable height conductive and dielectric elements
- Patent number 11,837,534
- Issue date Dec 5, 2023
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die interconnect substrate, an electrical device and a method for f...
- Patent number 11,784,128
- Issue date Oct 10, 2023
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded multi-die interconnect bridge packages with lithographical...
- Patent number 11,764,158
- Issue date Sep 19, 2023
- Intel Corporation
- Amruthavalli Pallavi Alur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Panel level packaging for multi-die products interconnected with ve...
- Patent number 11,735,531
- Issue date Aug 22, 2023
- Intel Corporation
- Srinivas V. Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electromigration resistant and profile consistent contact arrays
- Patent number 11,699,648
- Issue date Jul 11, 2023
- Tahoe Research, LTD.
- Srinivas V. Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package architecture utilizing photoimageable dielectric (PID) for...
- Patent number 11,574,874
- Issue date Feb 7, 2023
- Intel Corporation
- Robert A. May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dielectric for high density substrate interconnects
- Patent number 11,552,010
- Issue date Jan 10, 2023
- Intel Corporation
- Robert A. May
- C07 - ORGANIC CHEMISTRY
Information Patent Grant
Package substrate with high-density interconnect layer having pilla...
- Patent number 11,532,584
- Issue date Dec 20, 2022
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface finishes with low rBTV for fine and mixed bump pitch archit...
- Patent number 11,488,918
- Issue date Nov 1, 2022
- Intel Corporation
- Kristof Darmawaikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin film barrier seed metallization in magnetic-plugged through ho...
- Patent number 11,443,885
- Issue date Sep 13, 2022
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic device with embedded die substrate on interposer
- Patent number 11,430,740
- Issue date Aug 30, 2022
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip package with high density interconnects
- Patent number 11,393,766
- Issue date Jul 19, 2022
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package supports
- Patent number 11,309,192
- Issue date Apr 19, 2022
- Intel Corporation
- Kristof Kuwawi Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electromigration resistant and profile consistent contact arrays
- Patent number 11,309,239
- Issue date Apr 19, 2022
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enabling magnetic films in inductors integrated into semiconductor...
- Patent number 11,270,959
- Issue date Mar 8, 2022
- Intel Corporation
- Kirstof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus with embedded fine line space in a cavity, and a method f...
- Patent number 11,272,619
- Issue date Mar 8, 2022
- Intel Corporation
- Kristof Darmawikarta
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Sacrificial dielectric for lithographic via formation to enable via...
- Patent number 11,264,346
- Issue date Mar 1, 2022
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual-damascene zero-misalignment-via process for semiconductor pack...
- Patent number 11,264,307
- Issue date Mar 1, 2022
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Polarization defined zero misalignment vias for semiconductor packa...
- Patent number 11,264,239
- Issue date Mar 1, 2022
- Intel Corporation
- Hiroki Tanaka
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
CHIP PACKAGE WITH A GLASS INTERPOSER
- Publication number 20240371714
- Publication date Nov 7, 2024
- ADVANCED MICRO DEVICES, INC.
- Deepak Vasant KULKARNI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC DEVICE WITH EMBEDDED DIE SUBSTRATE ON INTERPOSER
- Publication number 20240332203
- Publication date Oct 3, 2024
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP PACKAGE WITH CORE EMBEDDED CHIPLET
- Publication number 20240234304
- Publication date Jul 11, 2024
- ADVANCED MICRO DEVICES, INC.
- Deepak Vasant KULKARNI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH-MAGNETIC INDUCTOR
- Publication number 20240212908
- Publication date Jun 27, 2024
- ADVANCED MICRO DEVICES, INC.
- Robert Grant Spurney
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE INTERCONNECT SUBSTRATE, AN ELECTRICAL DEVICE AND A METHOD FOR F...
- Publication number 20240105621
- Publication date Mar 28, 2024
- Intel Corporation
- Robert Alan MAY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATCH ACCOMMODATING EMBEDDED DIES HAVING DIFFERENT THICKNESSES
- Publication number 20240088121
- Publication date Mar 14, 2024
- Intel Corporation
- Srinivas PIETAMBARAM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SUPPORTS
- Publication number 20240071777
- Publication date Feb 29, 2024
- Intel Corporation
- Kristof Kuwawi Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ORGANIC PACKAGE CORE FOR A SUBSTRATE WITH HIGH DENSITY PLATED HOLES
- Publication number 20240047229
- Publication date Feb 8, 2024
- ADVANCED MICRO DEVICES, INC.
- SRI RANGA SAI BOYAPATI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR CONSTRUCTING PACKAGE SUBSTRATES WITH HIGH DENSITY
- Publication number 20240047228
- Publication date Feb 8, 2024
- ADVANCED MICRO DEVICES, INC.
- Sri Ranga Sai Boyapati
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGING ARCHITECTURE WITH COAXIAL PILLARS FOR HIGH-SPEED INTERCON...
- Publication number 20230420412
- Publication date Dec 28, 2023
- Intel Corporation
- Hiroki Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PANEL LEVEL PACKAGING FOR MULTI-DIE PRODUCTS INTERCONNECTED WITH VE...
- Publication number 20230326866
- Publication date Oct 12, 2023
- Intel Corporation
- Srinivas V. PIETAMBARAM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Die Interconnect Substrate, an Electrical Device and a Method for F...
- Publication number 20230146783
- Publication date May 11, 2023
- Intel Corporation
- Robert Alan MAY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-CHIP PACKAGE WITH HIGH DENSITY INTERCONNECTS
- Publication number 20230140389
- Publication date May 4, 2023
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SURFACE FINISHES WITH LOW RBTV FOR FINE AND MIXED BUMP PITCH ARCHIT...
- Publication number 20230015619
- Publication date Jan 19, 2023
- Intel Corporation
- Kristof DARMAWAIKARTA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MAGNETO-OPTICAL KERR EFFECT INTERCONNECTS FOR PHOTONIC PACKAGING
- Publication number 20220413233
- Publication date Dec 29, 2022
- Intel Corporation
- Hiroki Tanaka
- G02 - OPTICS
Information Patent Application
MULTI-CHIP PACKAGE WITH HIGH DENSITY INTERCONNECTS
- Publication number 20220319996
- Publication date Oct 6, 2022
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC DEVICE WITH EMBEDDED DIE SUBSTRATE ON INTERPOSER
- Publication number 20220230965
- Publication date Jul 21, 2022
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTROMIGRATION RESISTANT AND PROFILE CONSISTENT CONTACT ARRAYS
- Publication number 20220199515
- Publication date Jun 23, 2022
- Intel Corporation
- Srinivas V. Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FARADAY ROTATOR INTERCONNECT AS A THROUGH-VIA CONFIGURATION IN A PA...
- Publication number 20220187548
- Publication date Jun 16, 2022
- Intel Corporation
- Brandon C. MARIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FARADAY ROTATOR OPTICAL INTERCONNECTS FOR OPTICAL INSULATOR IN SEMI...
- Publication number 20220187549
- Publication date Jun 16, 2022
- Intel Corporation
- Hiroki TANAKA
- G02 - OPTICS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SUPPORTS
- Publication number 20220181166
- Publication date Jun 9, 2022
- Intel Corporation
- Kristof Kuwawi Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS WITH EMBEDDED FINE LINE SPACE IN A CAVITY, AND A METHOD F...
- Publication number 20220183157
- Publication date Jun 9, 2022
- Intel Corporation
- Kristof Darmawikarta
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SACRIFICIAL DIELECTRIC FOR LITHOGRAPHIC VIA FORMATION TO ENABLE VIA...
- Publication number 20220122935
- Publication date Apr 21, 2022
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC DEVICE WITH EMBEDDED DIE SUBSTRATE ON INTERPOSER
- Publication number 20220108957
- Publication date Apr 7, 2022
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IN-PACKAGE RF WAVEGUIDES AS HIGH BANDWIDTH CHIP-TO-CHIP INTERCONNEC...
- Publication number 20220084965
- Publication date Mar 17, 2022
- Intel Corporation
- Aleksandar ALEKSOV
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC STRUCTURES INCLUDING BRIDGES
- Publication number 20210391263
- Publication date Dec 16, 2021
- Intel Corporation
- Bai Nie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PANEL LEVEL PACKAGING FOR MULTI-DIE PRODUCTS INTERCONNECTED WITH VE...
- Publication number 20210343653
- Publication date Nov 4, 2021
- Intel Corporation
- Srinivas V. PIETAMBARAM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Die Interconnect Substrate, an Electrical Device and a Method for F...
- Publication number 20210320066
- Publication date Oct 14, 2021
- Intel Corporation
- Robert Alan MAY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AN APPARATUS WITH EMBEDDED FINE LINE SPACE IN A CAVITY, AND A METHO...
- Publication number 20210307172
- Publication date Sep 30, 2021
- Intel Corporation
- Kristof Darmawikarta
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
EMBEDDED MULTI-DIE INTERCONNECT BRIDGE PACKAGES WITH LITHOTGRAPHICA...
- Publication number 20210257303
- Publication date Aug 19, 2021
- Intel Corporation
- Amruthavalli Pallavi Alur
- H01 - BASIC ELECTRIC ELEMENTS

Sri Ranga Sai Boyapati

Person

Patents Grantslast 30 patents

Integrated circuit package supports

Microelectronic device with embedded die substrate on interposer

Surface finishes with low RBTV for fine and mixed bump pitch archit...

Microelectronic structures including bridges

Multi-chip package with high density interconnects

Sacrificial dielectric for lithographic via formation to enable via...

Die interconnect substrate, an electrical device and a method for f...

In-package RF waveguides as high bandwidth chip-to-chip interconnec...

Microelectronic device with embedded die substrate on interposer

Patch accommodating embedded dies having different thicknesses

Integrated circuit package supports

Substrate with variable height conductive and dielectric elements

Die interconnect substrate, an electrical device and a method for f...

Embedded multi-die interconnect bridge packages with lithographical...

Panel level packaging for multi-die products interconnected with ve...

Electromigration resistant and profile consistent contact arrays

Package architecture utilizing photoimageable dielectric (PID) for...

Dielectric for high density substrate interconnects

Package substrate with high-density interconnect layer having pilla...

Surface finishes with low rBTV for fine and mixed bump pitch archit...

Thin film barrier seed metallization in magnetic-plugged through ho...

Microelectronic device with embedded die substrate on interposer

Multi-chip package with high density interconnects

Integrated circuit package supports

Electromigration resistant and profile consistent contact arrays

Enabling magnetic films in inductors integrated into semiconductor...

Apparatus with embedded fine line space in a cavity, and a method f...

Sacrificial dielectric for lithographic via formation to enable via...

Dual-damascene zero-misalignment-via process for semiconductor pack...

Polarization defined zero misalignment vias for semiconductor packa...

Patents Applicationslast 30 patents

CHIP PACKAGE WITH A GLASS INTERPOSER

MICROELECTRONIC DEVICE WITH EMBEDDED DIE SUBSTRATE ON INTERPOSER

CHIP PACKAGE WITH CORE EMBEDDED CHIPLET

THROUGH-MAGNETIC INDUCTOR

DIE INTERCONNECT SUBSTRATE, AN ELECTRICAL DEVICE AND A METHOD FOR F...

PATCH ACCOMMODATING EMBEDDED DIES HAVING DIFFERENT THICKNESSES

INTEGRATED CIRCUIT PACKAGE SUPPORTS

ORGANIC PACKAGE CORE FOR A SUBSTRATE WITH HIGH DENSITY PLATED HOLES

METHODS FOR CONSTRUCTING PACKAGE SUBSTRATES WITH HIGH DENSITY

PACKAGING ARCHITECTURE WITH COAXIAL PILLARS FOR HIGH-SPEED INTERCON...

PANEL LEVEL PACKAGING FOR MULTI-DIE PRODUCTS INTERCONNECTED WITH VE...

Die Interconnect Substrate, an Electrical Device and a Method for F...

MULTI-CHIP PACKAGE WITH HIGH DENSITY INTERCONNECTS

SURFACE FINISHES WITH LOW RBTV FOR FINE AND MIXED BUMP PITCH ARCHIT...

MAGNETO-OPTICAL KERR EFFECT INTERCONNECTS FOR PHOTONIC PACKAGING

MULTI-CHIP PACKAGE WITH HIGH DENSITY INTERCONNECTS

MICROELECTRONIC DEVICE WITH EMBEDDED DIE SUBSTRATE ON INTERPOSER

ELECTROMIGRATION RESISTANT AND PROFILE CONSISTENT CONTACT ARRAYS

FARADAY ROTATOR INTERCONNECT AS A THROUGH-VIA CONFIGURATION IN A PA...

FARADAY ROTATOR OPTICAL INTERCONNECTS FOR OPTICAL INSULATOR IN SEMI...

INTEGRATED CIRCUIT PACKAGE SUPPORTS

APPARATUS WITH EMBEDDED FINE LINE SPACE IN A CAVITY, AND A METHOD F...

SACRIFICIAL DIELECTRIC FOR LITHOGRAPHIC VIA FORMATION TO ENABLE VIA...

MICROELECTRONIC DEVICE WITH EMBEDDED DIE SUBSTRATE ON INTERPOSER

IN-PACKAGE RF WAVEGUIDES AS HIGH BANDWIDTH CHIP-TO-CHIP INTERCONNEC...

MICROELECTRONIC STRUCTURES INCLUDING BRIDGES

PANEL LEVEL PACKAGING FOR MULTI-DIE PRODUCTS INTERCONNECTED WITH VE...

Die Interconnect Substrate, an Electrical Device and a Method for F...

AN APPARATUS WITH EMBEDDED FINE LINE SPACE IN A CAVITY, AND A METHO...

EMBEDDED MULTI-DIE INTERCONNECT BRIDGE PACKAGES WITH LITHOTGRAPHICA...