Sridhar Subramanian

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-die integrated circuit with data processing engine array
- Patent number 12,001,367
- Issue date Jun 4, 2024
- Xilinx, Inc.
- Juan J. Noguera Serra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-die integrated circuit with data processing engine array
- Patent number 11,693,808
- Issue date Jul 4, 2023
- Xilinx, Inc.
- Juan J. Noguera Serra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fine-grained SD-WAN optimization services for cloud-native applicat...
- Patent number 11,665,095
- Issue date May 30, 2023
- Cisco Technology, Inc.
- Sridhar Subramanian
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Network authorization in web-based or single sign-on authentication...
- Patent number 11,528,270
- Issue date Dec 13, 2022
- Cisco Technology, Inc.
- Victor Moreno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable device having a data processing engine (DPE) array
- Patent number 11,386,020
- Issue date Jul 12, 2022
- Xilinx, Inc.
- Matthew H. Klein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-die integrated circuit with data processing engine array
- Patent number 11,288,222
- Issue date Mar 29, 2022
- Xilinx, Inc.
- Juan J. Noguera Serra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Network authorization in web-based or single sign-on authentication...
- Patent number 10,673,850
- Issue date Jun 2, 2020
- Cisco Technology, Inc.
- Victor Moreno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Network address transparency through user role authentication
- Patent number 10,462,007
- Issue date Oct 29, 2019
- Cisco Technology, Inc.
- Sanjay Kumar Hooda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Network resource sharing for routing and forwarding information
- Patent number 10,003,569
- Issue date Jun 19, 2018
- Cisco Technology, Inc.
- Rajagopalan Janakiraman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and devices for providing service insertion in a TRILL network
- Patent number 9,680,751
- Issue date Jun 13, 2017
- Cisco Technology, Inc.
- Rajagopalan Janakiraman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and system for extending network resources campus-wide based...
- Patent number 9,648,005
- Issue date May 9, 2017
- Cisco Technology, Inc.
- Rajagopalan Janakiraman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Accelerating network convergence for layer 3 roams in a next genera...
- Patent number 9,641,462
- Issue date May 2, 2017
- Cisco Technology, Inc.
- Rajagopalan Janakiraman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Network resource sharing for routing and forwarding information
- Patent number 9,590,906
- Issue date Mar 7, 2017
- Cisco Technology, Inc.
- Rajagopalan Janakiraman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and system for extending network resources campus-wide based...
- Patent number 9,369,473
- Issue date Jun 14, 2016
- Cisco Technology, Inc.
- Rajagopalan Janakiraman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and devices for providing service clustering in a trill net...
- Patent number 9,049,127
- Issue date Jun 2, 2015
- Cisco Technology, Inc.
- Rajagopalan Janakiraman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reducing dynamic power consumption of a memory circuit
- Patent number 8,743,653
- Issue date Jun 3, 2014
- Xilinx, Inc.
- Sridhar Narayanan
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing power consumption in a segmented memory
- Patent number 8,503,264
- Issue date Aug 6, 2013
- Xilinx, Inc.
- Sridhar Narayanan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for verifying output-based clock gating
- Patent number 8,423,935
- Issue date Apr 16, 2013
- Xilinx, Inc.
- Chaiyasit Manovit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Retry mechanism
- Patent number 8,359,414
- Issue date Jan 22, 2013
- Apple Inc.
- James B. Keller
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Latency reduction for cache coherent bus-based cache
- Patent number 8,347,040
- Issue date Jan 1, 2013
- Apple Inc.
- Brian P. Lilly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Oversampling-based scheme for synchronous interface communication
- Patent number 8,307,236
- Issue date Nov 6, 2012
- Apple Inc.
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller with loopback test interface
- Patent number 8,301,941
- Issue date Oct 30, 2012
- Apple Inc.
- Luka Bodrozic
- G01 - MEASURING TESTING
Information Patent Grant
Combined single error correction/device kill detection code
- Patent number 8,219,880
- Issue date Jul 10, 2012
- Apple Inc.
- Brian P. Lilly
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for clock gating circuits
- Patent number 8,219,946
- Issue date Jul 10, 2012
- Xilinx, Inc.
- Chaiyasit Manovit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for verifying power-optimized electronic designs...
- Patent number 8,099,703
- Issue date Jan 17, 2012
- Xilinx, Inc.
- Chaiyasit Manovit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller with loopback test interface
- Patent number 8,086,915
- Issue date Dec 27, 2011
- Apple Inc.
- Luka Bodrozic
- G01 - MEASURING TESTING
Information Patent Grant
Combined single error correction/device kill detection code
- Patent number 8,055,975
- Issue date Nov 8, 2011
- Apple Inc.
- Brian P. Lilly
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Retry mechanism
- Patent number 7,991,928
- Issue date Aug 2, 2011
- Apple Inc.
- James B. Keller
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Non-blocking address switch with shallow per agent queues
- Patent number 7,970,970
- Issue date Jun 28, 2011
- Apple Inc.
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latency reduction for cache coherent bus-based cache
- Patent number 7,949,832
- Issue date May 24, 2011
- Apple Inc.
- Brian P. Lilly
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTI-DIE INTEGRATED CIRCUIT WITH DATA PROCESSING ENGINE ARRAY
- Publication number 20230289311
- Publication date Sep 14, 2023
- Xilinx, Inc.
- Juan J. Noguera Serra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FINE-GRAINED SD-WAN OPTIMIZATION SERVICES FOR CLOUD-NATIVE APPLICAT...
- Publication number 20230261999
- Publication date Aug 17, 2023
- Cisco Technology, Inc.
- Sridhar Subramanian
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MULTI-DIE INTEGRATED CIRCUIT WITH DATA PROCESSING ENGINE ARRAY
- Publication number 20220197846
- Publication date Jun 23, 2022
- Xilinx, Inc.
- Juan J. Noguera Serra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-DIE INTEGRATED CIRCUIT WITH DATA PROCESSING ENGINE ARRAY
- Publication number 20220100691
- Publication date Mar 31, 2022
- Xilinx, Inc.
- Juan J. Noguera Serra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FINE-GRAINED SD-WAN OPTIMIZATION SERVICES FOR CLOUD-NATIVE APPLICAT...
- Publication number 20210266262
- Publication date Aug 26, 2021
- Cisco Technology, Inc.
- Sridhar Subramanian
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
NETWORK AUTHORIZATION IN WEB-BASED OR SINGLE SIGN-ON AUTHENTICATION...
- Publication number 20200267147
- Publication date Aug 20, 2020
- Cisco Technology, Inc.
- Victor Moreno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK AUTHORIZATION IN WEB-BASED OR SINGLE SIGN-ON AUTHENTICATION...
- Publication number 20180176218
- Publication date Jun 21, 2018
- Cisco Technology, Inc.
- Victor Moreno
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
NETWORK ADDRESS TRANSPARENCY THROUGH USER ROLE AUTHENTICATION
- Publication number 20170373936
- Publication date Dec 28, 2017
- Cisco Technology, Inc.
- Sanjay Kumar Hooda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
NETWORK RESOURCE SHARING FOR ROUTING AND FORWARDING INFORMATION
- Publication number 20170134340
- Publication date May 11, 2017
- Cisco Technology, Inc.
- Rajagopalan Janakiraman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND SYSTEM FOR EXTENDING NETWORK RESOURCES CAMPUS-WIDE BASED...
- Publication number 20160261579
- Publication date Sep 8, 2016
- Cisco Technology, Inc.
- Rajagopalan Janakiraman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
NETWORK RESOURCE SHARING FOR ROUTING AND FORWARDING INFORMATION
- Publication number 20160087892
- Publication date Mar 24, 2016
- Cisco Technology, Inc.
- Rajagopalan Janakiraman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHODS AND DEVICES FOR PROVIDING SERVICE INSERTION IN A TRILL NETWORK
- Publication number 20150326478
- Publication date Nov 12, 2015
- Cisco Technology, Inc.
- Rajagopalan Janakiraman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND SYSTEM FOR EXTENDING NETWORK RESOURCES CAMPUS-WIDE BASED...
- Publication number 20150074741
- Publication date Mar 12, 2015
- Cisco Technology, Inc.
- Rajagopalan Janakiraman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Accelerating Network Convergence for Layer 3 Roams in a Next Genera...
- Publication number 20140317249
- Publication date Oct 23, 2014
- Cisco Technology, Inc.
- Rajagopalan Janakiraman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHODS AND DEVICES FOR PROVIDING SERVICE CLUSTERING IN A TRILL NET...
- Publication number 20140254374
- Publication date Sep 11, 2014
- Cisco Technology, Inc.
- Rajagopalan Janakiraman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory Controller with Loopback Test Interface
- Publication number 20120072787
- Publication date Mar 22, 2012
- Luka Bodrozic
- G01 - MEASURING TESTING
Information Patent Application
Combined Single Error Correction/Device Kill Detection Code
- Publication number 20120017135
- Publication date Jan 19, 2012
- Brian P. Lilly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Retry Mechanism
- Publication number 20110252165
- Publication date Oct 13, 2011
- James B. Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Latency Reduction for Cache Coherent Bus-Based Cache
- Publication number 20110197030
- Publication date Aug 11, 2011
- Brian P. Lilly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Oversampling-Based Scheme for Synchronous Interface Communication
- Publication number 20110040998
- Publication date Feb 17, 2011
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Controller with Loopback Test Interface
- Publication number 20110035560
- Publication date Feb 10, 2011
- Luka Bodrozic
- G01 - MEASURING TESTING
Information Patent Application
Non-blocking Address Switch with Shallow Per Agent Queues
- Publication number 20100235675
- Publication date Sep 16, 2010
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Latency Reduction for Cache Coherent Bus-Based Cache
- Publication number 20100161905
- Publication date Jun 24, 2010
- Brian P. Lilly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Retry Mechanism
- Publication number 20090177846
- Publication date Jul 9, 2009
- James B. Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Non-blocking Address Switch with Shallow Per Agent Queues
- Publication number 20090055568
- Publication date Feb 26, 2009
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Controller with Loopback Test Interface
- Publication number 20080307276
- Publication date Dec 11, 2008
- Luka Bodrozic
- G01 - MEASURING TESTING
Information Patent Application
Latency Reduction for Cache Coherent Bus-Based Cache
- Publication number 20080307168
- Publication date Dec 11, 2008
- Brian P. Lilly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Combined Single Error Correction/Device Kill Detection Code
- Publication number 20080307286
- Publication date Dec 11, 2008
- Brian P. Lilly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Oversampling-Based Scheme for Synchronous Interface Communication
- Publication number 20080195884
- Publication date Aug 14, 2008
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Partially Populated, Hierarchical Crossbar
- Publication number 20070271402
- Publication date Nov 22, 2007
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING

Sridhar Subramanian

Person

Patents Grantslast 30 patents

Multi-die integrated circuit with data processing engine array

Multi-die integrated circuit with data processing engine array

Fine-grained SD-WAN optimization services for cloud-native applicat...

Network authorization in web-based or single sign-on authentication...

Programmable device having a data processing engine (DPE) array

Multi-die integrated circuit with data processing engine array

Network authorization in web-based or single sign-on authentication...

Network address transparency through user role authentication

Network resource sharing for routing and forwarding information

Methods and devices for providing service insertion in a TRILL network

Method and system for extending network resources campus-wide based...

Accelerating network convergence for layer 3 roams in a next genera...

Network resource sharing for routing and forwarding information

Method and system for extending network resources campus-wide based...

Methods and devices for providing service clustering in a trill net...

Reducing dynamic power consumption of a memory circuit

Reducing power consumption in a segmented memory

Method and apparatus for verifying output-based clock gating

Retry mechanism

Latency reduction for cache coherent bus-based cache

Oversampling-based scheme for synchronous interface communication

Memory controller with loopback test interface

Combined single error correction/device kill detection code

Method for clock gating circuits

Method and system for verifying power-optimized electronic designs...

Memory controller with loopback test interface

Combined single error correction/device kill detection code

Retry mechanism

Non-blocking address switch with shallow per agent queues

Latency reduction for cache coherent bus-based cache

Patents Applicationslast 30 patents

MULTI-DIE INTEGRATED CIRCUIT WITH DATA PROCESSING ENGINE ARRAY

FINE-GRAINED SD-WAN OPTIMIZATION SERVICES FOR CLOUD-NATIVE APPLICAT...

MULTI-DIE INTEGRATED CIRCUIT WITH DATA PROCESSING ENGINE ARRAY

MULTI-DIE INTEGRATED CIRCUIT WITH DATA PROCESSING ENGINE ARRAY

FINE-GRAINED SD-WAN OPTIMIZATION SERVICES FOR CLOUD-NATIVE APPLICAT...

NETWORK AUTHORIZATION IN WEB-BASED OR SINGLE SIGN-ON AUTHENTICATION...

NETWORK AUTHORIZATION IN WEB-BASED OR SINGLE SIGN-ON AUTHENTICATION...

NETWORK ADDRESS TRANSPARENCY THROUGH USER ROLE AUTHENTICATION

NETWORK RESOURCE SHARING FOR ROUTING AND FORWARDING INFORMATION

METHOD AND SYSTEM FOR EXTENDING NETWORK RESOURCES CAMPUS-WIDE BASED...

NETWORK RESOURCE SHARING FOR ROUTING AND FORWARDING INFORMATION

METHODS AND DEVICES FOR PROVIDING SERVICE INSERTION IN A TRILL NETWORK

METHOD AND SYSTEM FOR EXTENDING NETWORK RESOURCES CAMPUS-WIDE BASED...

Accelerating Network Convergence for Layer 3 Roams in a Next Genera...

METHODS AND DEVICES FOR PROVIDING SERVICE CLUSTERING IN A TRILL NET...

Memory Controller with Loopback Test Interface

Combined Single Error Correction/Device Kill Detection Code

Retry Mechanism

Latency Reduction for Cache Coherent Bus-Based Cache

Oversampling-Based Scheme for Synchronous Interface Communication

Memory Controller with Loopback Test Interface

Non-blocking Address Switch with Shallow Per Agent Queues

Latency Reduction for Cache Coherent Bus-Based Cache

Retry Mechanism

Non-blocking Address Switch with Shallow Per Agent Queues

Memory Controller with Loopback Test Interface

Latency Reduction for Cache Coherent Bus-Based Cache

Combined Single Error Correction/Device Kill Detection Code

Oversampling-Based Scheme for Synchronous Interface Communication

Partially Populated, Hierarchical Crossbar