Sriharsha Vasadi

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Austin, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
System and method of mitigating interference caused by coupling fro...
- Patent number 12,028,024
- Issue date Jul 2, 2024
- Silicon Laboratories Inc.
- Rangakrishnan Srinivasan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for reducing output harmonics
- Patent number 10,461,701
- Issue date Oct 29, 2019
- Silicon Laboratories Inc.
- Sherry X. Wu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for reducing output harmonics
- Patent number 10,411,583
- Issue date Sep 10, 2019
- Silicon Laboratories Inc.
- Sriharsha Vasadi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Synthesizer—power amplifier interface in a wireless circuit
- Patent number 10,256,854
- Issue date Apr 9, 2019
- Silicon Laboratories Inc.
- Rangakrishnan Srinivasan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND METHOD OF MITIGATING INTERFERENCE CAUSED BY COUPLING FRO...
- Publication number 20240267005
- Publication date Aug 8, 2024
- Silicon Laboratories Inc.
- Rangakrishnan Srinivasan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEM AND METHOD OF MITIGATING INTERFERENCE CAUSED BY COUPLING FRO...
- Publication number 20210175855
- Publication date Jun 10, 2021
- Silicon Laboratories Inc.
- Rangakrishnan Srinivasan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEM AND METHOD FOR REDUCING OUTPUT HARMONICS
- Publication number 20190229608
- Publication date Jul 25, 2019
- Silicon Laboratories Inc.
- Sriharsha Vasadi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEM AND METHOD FOR REDUCING OUTPUT HARMONICS
- Publication number 20190229684
- Publication date Jul 25, 2019
- Silicon Laboratories Inc.
- Sherry X. Wu
- H03 - BASIC ELECTRONIC CIRCUITRY