Srinivasa R. Sridharan

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Bandwidth-aware fabric traffic shaping
- Patent number 12,039,169
- Issue date Jul 16, 2024
- Apple Inc.
- Anjana Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ensuring transactional ordering in I/O agent
- Patent number 11,941,428
- Issue date Mar 26, 2024
- Apple Inc.
- Sagi Lahav
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mitigating retention of previously-critical cache lines
- Patent number 11,921,640
- Issue date Mar 5, 2024
- Apple Inc.
- Tyler J. Huberty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Allocation of a buffer located in system memory into a cache memory
- Patent number 11,893,251
- Issue date Feb 6, 2024
- Apple Inc.
- Rohit Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Criticality-informed caching policies
- Patent number 11,822,480
- Issue date Nov 21, 2023
- Apple Inc.
- Tyler J. Huberty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable system on a chip
- Patent number 11,803,471
- Issue date Oct 31, 2023
- Apple Inc.
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic allocation of cache memory as RAM
- Patent number 11,704,245
- Issue date Jul 18, 2023
- Apple Inc.
- Rohit Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
I/O agent
- Patent number 11,550,716
- Issue date Jan 10, 2023
- Apple Inc.
- Gaurav Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inter cluster snoop latency reduction
- Patent number 11,537,538
- Issue date Dec 27, 2022
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resource access management
- Patent number 11,275,616
- Issue date Mar 15, 2022
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel coherence and memory cache processing pipelines
- Patent number 11,138,111
- Issue date Oct 5, 2021
- Apple Inc.
- Muditha Kanchana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inter cluster snoop latency reduction
- Patent number 11,016,913
- Issue date May 25, 2021
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache drop feature to increase memory bandwidth and save power
- Patent number 10,970,223
- Issue date Apr 6, 2021
- Apple Inc.
- Wolfgang H. Klingauf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for providing distributed global ordering
- Patent number 10,877,888
- Issue date Dec 29, 2020
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coherence flows for dual-processing pipelines
- Patent number 10,678,691
- Issue date Jun 9, 2020
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Real-time resource handling in resource retry queue
- Patent number 10,417,146
- Issue date Sep 17, 2019
- Apple Inc.
- Sridhar Kotha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communication queue management system
- Patent number 10,298,511
- Issue date May 21, 2019
- Apple Inc.
- Manu Gulati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache drop feature to increase memory bandwidth and save power
- Patent number 10,289,565
- Issue date May 14, 2019
- Apple Inc.
- Wolfgang H. Klingauf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communications fabric with split paths for control and data packets
- Patent number 10,206,175
- Issue date Feb 12, 2019
- Apple Inc.
- Munetoshi Fukami
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Communications fabric with split paths for control and data packets
- Patent number 9,860,841
- Issue date Jan 2, 2018
- Apple Inc.
- Munetoshi Fukami
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Criticality-Informed Caching Policies with Multiple Criticality Levels
- Publication number 20240168887
- Publication date May 23, 2024
- Apple Inc.
- Tyler J. Huberty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic Allocation of Cache Memory as RAM
- Publication number 20240126457
- Publication date Apr 18, 2024
- Apple Inc.
- Rohit Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bandwidth-Aware Fabric Traffic Shaping
- Publication number 20230325086
- Publication date Oct 12, 2023
- Apple Inc.
- Anjana Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
I/O Agent
- Publication number 20230161700
- Publication date May 25, 2023
- Apple Inc.
- Gaurav Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic Allocation of Cache Memory as RAM
- Publication number 20230067307
- Publication date Mar 2, 2023
- Apple Inc.
- Rohit Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Criticality-Informed Caching Policies
- Publication number 20230066236
- Publication date Mar 2, 2023
- Apple Inc.
- Tyler J. Huberty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Allocation of a Buffer Located in System Memory into a Cache Memory
- Publication number 20230062917
- Publication date Mar 2, 2023
- Apple Inc.
- Rohit Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Ensuring Transactional Ordering in I/O Agent
- Publication number 20230064526
- Publication date Mar 2, 2023
- Apple Inc.
- Sagi Lahav
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mitigating Retention of Previously-Critical Cache Lines
- Publication number 20230060225
- Publication date Mar 2, 2023
- Apple Inc.
- Tyler J. Huberty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Counters For Ensuring Transactional Ordering in I/O Agent
- Publication number 20230063676
- Publication date Mar 2, 2023
- Apple Inc.
- Sagi Lahav
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
I/O Agent
- Publication number 20220318136
- Publication date Oct 6, 2022
- Apple Inc.
- Gaurav Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Inter Cluster Snoop Latency Reduction
- Publication number 20210303486
- Publication date Sep 30, 2021
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESOURCE ACCESS MANAGEMENT
- Publication number 20200394070
- Publication date Dec 17, 2020
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COHERENCE FLOWS FOR DUAL-PROCESSING PIPELINES
- Publication number 20200081840
- Publication date Mar 12, 2020
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL COHERENCE AND MEMORY CACHE PROCESSING PIPELINES
- Publication number 20200081838
- Publication date Mar 12, 2020
- Apple Inc.
- Muditha Kanchana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PROVIDING DISTRIBUTED GLOBAL ORDERING
- Publication number 20200081837
- Publication date Mar 12, 2020
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE DROP FEATURE TO INCREASE MEMORY BANDWIDTH AND SAVE POWER
- Publication number 20190266102
- Publication date Aug 29, 2019
- Apple Inc.
- Wolfgang H. Klingauf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE DROP FEATURE TO INCREASE MEMORY BANDWIDTH AND SAVE POWER
- Publication number 20180349291
- Publication date Dec 6, 2018
- Apple Inc.
- Wolfgang H. Klingauf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMUNICATIONS FABRIC WITH SPLIT PATHS FOR CONTROL AND DATA PACKETS
- Publication number 20180077649
- Publication date Mar 15, 2018
- Apple Inc.
- Munetoshi Fukami
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
COMMUNICATION QUEUE MANAGEMENT SYSTEM
- Publication number 20180063016
- Publication date Mar 1, 2018
- Apple Inc.
- Manu Gulati
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
COMMUNICATIONS FABRIC WITH SPLIT PATHS FOR CONTROL AND DATA PACKETS
- Publication number 20170055218
- Publication date Feb 23, 2017
- Apple Inc.
- Munetoshi Fukami
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Srinivasa R. Sridharan

Person

Patents Grantslast 30 patents

Bandwidth-aware fabric traffic shaping

Ensuring transactional ordering in I/O agent

Mitigating retention of previously-critical cache lines

Allocation of a buffer located in system memory into a cache memory

Criticality-informed caching policies

Scalable system on a chip

Dynamic allocation of cache memory as RAM

I/O agent

Inter cluster snoop latency reduction

Resource access management

Parallel coherence and memory cache processing pipelines

Inter cluster snoop latency reduction

Cache drop feature to increase memory bandwidth and save power

Systems and methods for providing distributed global ordering

Coherence flows for dual-processing pipelines

Real-time resource handling in resource retry queue

Communication queue management system

Cache drop feature to increase memory bandwidth and save power

Communications fabric with split paths for control and data packets

Communications fabric with split paths for control and data packets

Patents Applicationslast 30 patents

Criticality-Informed Caching Policies with Multiple Criticality Levels

Dynamic Allocation of Cache Memory as RAM

Bandwidth-Aware Fabric Traffic Shaping

I/O Agent

Dynamic Allocation of Cache Memory as RAM

Criticality-Informed Caching Policies

Allocation of a Buffer Located in System Memory into a Cache Memory

Ensuring Transactional Ordering in I/O Agent

Mitigating Retention of Previously-Critical Cache Lines

Counters For Ensuring Transactional Ordering in I/O Agent

I/O Agent

Inter Cluster Snoop Latency Reduction

RESOURCE ACCESS MANAGEMENT

COHERENCE FLOWS FOR DUAL-PROCESSING PIPELINES

PARALLEL COHERENCE AND MEMORY CACHE PROCESSING PIPELINES

SYSTEMS AND METHODS FOR PROVIDING DISTRIBUTED GLOBAL ORDERING

CACHE DROP FEATURE TO INCREASE MEMORY BANDWIDTH AND SAVE POWER

CACHE DROP FEATURE TO INCREASE MEMORY BANDWIDTH AND SAVE POWER

COMMUNICATIONS FABRIC WITH SPLIT PATHS FOR CONTROL AND DATA PACKETS

COMMUNICATION QUEUE MANAGEMENT SYSTEM

COMMUNICATIONS FABRIC WITH SPLIT PATHS FOR CONTROL AND DATA PACKETS