Srinivasan Seetharaman

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Milpitas, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for evaluating integrity of adjacent sub blocks...
- Patent number 11,984,181
- Issue date May 14, 2024
- Western Digital Technologies, Inc.
- Srinivasan Seetharaman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sub block mode read scrub design for non-volatile memory
- Patent number 10,734,079
- Issue date Aug 4, 2020
- Western Digital Technologies, Inc.
- Srinivasan Seetharaman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transistor threshold voltage maintenance in 3D memory
- Patent number 10,691,372
- Issue date Jun 23, 2020
- Western Digital Technologies, Inc.
- Srinivasan Seetharaman
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Systems And Methods For Evaluating Integrity Of Adjacent Sub Blocks...
- Publication number 20200409808
- Publication date Dec 31, 2020
- Western Digital Technologies, Inc.
- Srinivasan Seetharaman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSISTOR THRESHOLD VOLTAGE MAINTENANCE IN 3D MEMORY
- Publication number 20200183610
- Publication date Jun 11, 2020
- Western Digital Technologies, Inc.
- Srinivasan Seetharaman
- G06 - COMPUTING CALCULATING COUNTING