Sriram Thyagarajan

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-port bitcell architecture
- Patent number 12,300,310
- Issue date May 13, 2025
- ARM Limited
- Vianney Antoine Choserot
- G11 - INFORMATION STORAGE
Information Patent Grant
Backside power supply techniques
- Patent number 12,218,664
- Issue date Feb 4, 2025
- ARM Limited
- Sriram Thyagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metal routing techniques
- Patent number 12,164,855
- Issue date Dec 10, 2024
- ARM Limited
- Sriram Thyagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-port memory architecture
- Patent number 12,087,357
- Issue date Sep 10, 2024
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-port circuit architecture
- Patent number 12,066,855
- Issue date Aug 20, 2024
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuitry for memory address collision prevention
- Patent number 12,066,926
- Issue date Aug 20, 2024
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wordline modulation techniques
- Patent number 11,900,995
- Issue date Feb 13, 2024
- ARM Limited
- Rajiv Kumar Sisodia
- G11 - INFORMATION STORAGE
Information Patent Grant
Frontside-to-backside intermixing architecture for coupling a front...
- Patent number 11,837,543
- Issue date Dec 5, 2023
- ARM Limited
- Andy Wangkun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory architecture with DC biasing
- Patent number 11,676,656
- Issue date Jun 13, 2023
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Flexible sizing and routing architecture
- Patent number 11,631,439
- Issue date Apr 18, 2023
- ARM Limited
- Sriram Thyagarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Slew-load characterization
- Patent number 11,624,777
- Issue date Apr 11, 2023
- ARM Limited
- Sriram Thyagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory compiler techniques
- Patent number 11,567,741
- Issue date Jan 31, 2023
- ARM Limited
- Mouli Rajaram Chollangi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cell architecture
- Patent number 11,557,583
- Issue date Jan 17, 2023
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Backside power rail architecture
- Patent number 11,443,777
- Issue date Sep 13, 2022
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Buried power rail structure for providing multi-domain power supply...
- Patent number 11,380,384
- Issue date Jul 5, 2022
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Power-gating techniques with buried metal
- Patent number 11,322,197
- Issue date May 3, 2022
- ARM Limited
- Rajiv Kumar Sisodia
- G11 - INFORMATION STORAGE
Information Patent Grant
Computer implemented system and method for generating a layout of a...
- Patent number 11,288,432
- Issue date Mar 29, 2022
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buried metal technique for critical signal nets
- Patent number 11,271,567
- Issue date Mar 8, 2022
- ARM Limited
- Andy Wangkun Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory multiplexing techniques
- Patent number 11,200,922
- Issue date Dec 14, 2021
- ARM Limited
- Sriram Thyagarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitcell with multiple read bitlines
- Patent number 11,170,843
- Issue date Nov 9, 2021
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Transistor gate arrangement to modify driver signal characteristics
- Patent number 11,145,651
- Issue date Oct 12, 2021
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Grant
Configurable control of integrated circuits
- Patent number 11,133,043
- Issue date Sep 28, 2021
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Read and write techniques
- Patent number 11,087,834
- Issue date Aug 10, 2021
- ARM Limited
- Yew Keong Chong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Metal layout techniques
- Patent number 11,068,639
- Issue date Jul 20, 2021
- ARM Limited
- Marlin Wayne Frederick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-port memory circuitry
- Patent number 11,056,183
- Issue date Jul 6, 2021
- ARM Limited
- Yew Keong Chong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Configurable integrated circuits
- Patent number 10,978,141
- Issue date Apr 13, 2021
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Grant
Control architecture for column decoder circuitry
- Patent number 10,878,893
- Issue date Dec 29, 2020
- ARM Limited
- Vianney Antoine Choserot
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method to access a memory location
- Patent number 10,817,420
- Issue date Oct 27, 2020
- ARM Limited
- Yew Keong Chong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer implemented system and method for generating a layout of a...
- Patent number 10,796,053
- Issue date Oct 6, 2020
- ARM Limited
- Paul de Dood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory structure with multi-cell poly pitch
- Patent number 10,763,267
- Issue date Sep 1, 2020
- ARM Limited
- Yew Keong Chong
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Systems, Methods, and Devices for a Wordline or a Bitline Formed an...
- Publication number 20250176152
- Publication date May 29, 2025
- Arm Limted
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Dual Wordline Applications in Memory
- Publication number 20250140310
- Publication date May 1, 2025
- ARM Limited
- Vivek Asthana
- G11 - INFORMATION STORAGE
Information Patent Application
POWER SAVING MODE CONTROL FOR A MEMORY INSTANCE
- Publication number 20250103129
- Publication date Mar 27, 2025
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Skew Cell Architecture
- Publication number 20250015133
- Publication date Jan 9, 2025
- ARM Limited
- Sriram Thyagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Port Bitcell Architecture
- Publication number 20240233814
- Publication date Jul 11, 2024
- ARM Limited
- Vianney Antoine Choserot
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-Port Circuit Architecture
- Publication number 20240219955
- Publication date Jul 4, 2024
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Port Bitcell Architecture
- Publication number 20240135988
- Publication date Apr 25, 2024
- ARM Limited
- Vianney Antoine Choserot
- G11 - INFORMATION STORAGE
Information Patent Application
Circuitry for Memory Address Collision Prevention
- Publication number 20240012748
- Publication date Jan 11, 2024
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Port Memory Architecture
- Publication number 20230410896
- Publication date Dec 21, 2023
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Application
Circuits and Methods for I/O Circuitry TSV Coupling
- Publication number 20230411351
- Publication date Dec 21, 2023
- ARM Limited
- Andy Wangkun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLEXIBLE SIZING AND ROUTING ARCHITECTURE
- Publication number 20230136348
- Publication date May 4, 2023
- ARM Limited
- Sriram Thyagarajan
- G11 - INFORMATION STORAGE
Information Patent Application
Wordline Modulation Techniques
- Publication number 20220319586
- Publication date Oct 6, 2022
- ARM Limited
- Rajiv Kumar Sisodia
- G11 - INFORMATION STORAGE
Information Patent Application
Metal Routing Techniques
- Publication number 20220309225
- Publication date Sep 29, 2022
- ARM Limited
- Sriram Thyagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Buried Power Rail Architecture
- Publication number 20220293522
- Publication date Sep 15, 2022
- ARM Limited
- Sriram Thyagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Architecture with DC Biasing
- Publication number 20220254411
- Publication date Aug 11, 2022
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Backside Power Supply Techniques
- Publication number 20220123751
- Publication date Apr 21, 2022
- ARM Limited
- Sriram Thyagarajan
- G11 - INFORMATION STORAGE
Information Patent Application
Power-Gating Techniques with Buried Metal
- Publication number 20220122656
- Publication date Apr 21, 2022
- ARM Limited
- Rajiv Kumar Sisodia
- G11 - INFORMATION STORAGE
Information Patent Application
Backside Power Rail Architecture
- Publication number 20220084561
- Publication date Mar 17, 2022
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Buried Metal Technique for Critical Signal Nets
- Publication number 20220077857
- Publication date Mar 10, 2022
- ARM Limited
- Andy Wangkun Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Cell Architecture
- Publication number 20220077134
- Publication date Mar 10, 2022
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Frontside-to-Backside Intermixing Architecture
- Publication number 20220068813
- Publication date Mar 3, 2022
- ARM Limited
- Andy Wangkun Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
POWER NETWORK FOR PROVIDING POWER SUPPLY TO MEMORY DEVICE
- Publication number 20220068346
- Publication date Mar 3, 2022
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Compiler Techniques
- Publication number 20210389934
- Publication date Dec 16, 2021
- ARM Limited
- Mouli Rajaram Chollangi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Slew-Load Characterization
- Publication number 20210333320
- Publication date Oct 28, 2021
- ARM Limited
- Sriram Thyagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BITCELL WITH MULTIPLE READ BITLINES
- Publication number 20210295898
- Publication date Sep 23, 2021
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Configurable Control of Integrated Circuits
- Publication number 20210241807
- Publication date Aug 5, 2021
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Multiplexing Techniques
- Publication number 20210193195
- Publication date Jun 24, 2021
- ARM Limited
- Sriram Thyagarajan
- G11 - INFORMATION STORAGE
Information Patent Application
Read and Write Techniques
- Publication number 20210065785
- Publication date Mar 4, 2021
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Application
Computer Implemented System and Method for Generating a Layout of a...
- Publication number 20210019463
- Publication date Jan 21, 2021
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROL ARCHITECTURE FOR COLUMN DECODER CIRCUITRY
- Publication number 20200388329
- Publication date Dec 10, 2020
- ARM Limited
- Vianney Antoine Choserot
- G11 - INFORMATION STORAGE

Sriram Thyagarajan

Person

Patents Grantslast 30 patents

Multi-port bitcell architecture

Backside power supply techniques

Metal routing techniques

Multi-port memory architecture

Multi-port circuit architecture

Circuitry for memory address collision prevention

Wordline modulation techniques

Frontside-to-backside intermixing architecture for coupling a front...

Memory architecture with DC biasing

Flexible sizing and routing architecture

Slew-load characterization

Memory compiler techniques

Cell architecture

Backside power rail architecture

Buried power rail structure for providing multi-domain power supply...

Power-gating techniques with buried metal

Computer implemented system and method for generating a layout of a...

Buried metal technique for critical signal nets

Memory multiplexing techniques

Bitcell with multiple read bitlines

Transistor gate arrangement to modify driver signal characteristics

Configurable control of integrated circuits

Read and write techniques

Metal layout techniques

Multi-port memory circuitry

Configurable integrated circuits

Control architecture for column decoder circuitry

Apparatus and method to access a memory location

Computer implemented system and method for generating a layout of a...

Memory structure with multi-cell poly pitch

Patents Applicationslast 30 patents

Systems, Methods, and Devices for a Wordline or a Bitline Formed an...

Dual Wordline Applications in Memory

POWER SAVING MODE CONTROL FOR A MEMORY INSTANCE

Skew Cell Architecture

Multi-Port Bitcell Architecture

Multi-Port Circuit Architecture

Multi-Port Bitcell Architecture

Circuitry for Memory Address Collision Prevention

Multi-Port Memory Architecture

Circuits and Methods for I/O Circuitry TSV Coupling

FLEXIBLE SIZING AND ROUTING ARCHITECTURE

Wordline Modulation Techniques

Metal Routing Techniques

Buried Power Rail Architecture

Memory Architecture with DC Biasing

Backside Power Supply Techniques

Power-Gating Techniques with Buried Metal

Backside Power Rail Architecture

Buried Metal Technique for Critical Signal Nets

Cell Architecture

Frontside-to-Backside Intermixing Architecture

POWER NETWORK FOR PROVIDING POWER SUPPLY TO MEMORY DEVICE

Memory Compiler Techniques

Slew-Load Characterization

BITCELL WITH MULTIPLE READ BITLINES

Configurable Control of Integrated Circuits

Memory Multiplexing Techniques

Read and Write Techniques

Computer Implemented System and Method for Generating a Layout of a...

CONTROL ARCHITECTURE FOR COLUMN DECODER CIRCUITRY