Stefano Surico

Person

Milano, IT

People

Patents Grantslast 30 patents

Information Patent Grant
Method and system for program pulse generation during programming o...
- Patent number 8,553,460
- Issue date Oct 8, 2013
- Atmel Corporation
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for program pulse generation during programming o...
- Patent number 8,120,963
- Issue date Feb 21, 2012
- Atmel Corporation
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Grant
Erase verify for memory devices
- Patent number 7,864,583
- Issue date Jan 4, 2011
- Atmel Corporation
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Grant
Flexible, low cost apparatus and method to introduce and check algo...
- Patent number 7,769,943
- Issue date Aug 3, 2010
- Atmel Corporation
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and device for managing a power supply power-on sequence
- Patent number 7,589,572
- Issue date Sep 15, 2009
- Atmel Corporation
- Massimiliano Frulio
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for program pulse generation during programming o...
- Patent number 7,570,519
- Issue date Aug 4, 2009
- Atmel Corporation
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementation of column redundancy for a flash memory with a high...
- Patent number 7,551,498
- Issue date Jun 23, 2009
- Atmel Corporation
- Simone Bartoli
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method to manage external voltage for semiconductor m...
- Patent number 7,525,856
- Issue date Apr 28, 2009
- Atmel Corporation
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Grant
Low voltage column decoder sharing a memory array p-well
- Patent number 7,447,071
- Issue date Nov 4, 2008
- Atmel Corporation
- Massimiliano Frulio
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive gate voltage regulation
- Patent number 7,417,904
- Issue date Aug 26, 2008
- Atmel Corporation
- Stefano Sivero
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for managing address bits during buffered program...
- Patent number 7,404,049
- Issue date Jul 22, 2008
- Atmel Corporation
- Simone Bartoli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for a programming approach for a nonvolatile elec...
- Patent number 7,345,921
- Issue date Mar 18, 2008
- Atmel Corporation
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for managing a suspend request in a flash memory
- Patent number 7,302,518
- Issue date Nov 27, 2007
- Atmel Corporation
- Stefano Surico
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for configuring parameters for a flash memory
- Patent number 7,249,215
- Issue date Jul 24, 2007
- Atmel Corporation
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for configuring parameters for flash memory
- Patent number 7,181,565
- Issue date Feb 20, 2007
- Atmel Corporation
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Grant
System for performing fast testing during flash reference cell setting
- Patent number 7,158,415
- Issue date Jan 2, 2007
- Atmel Corporation
- Lorenzo Bedarida
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND SYSTEM FOR PROGRAM PULSE GENERATION DURING PROGRAMMING O...
- Publication number 20120106250
- Publication date May 3, 2012
- ATMEL CORPORATION
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SYSTEM FOR PROGRAM PULSE GENERATION DURING PROGRAMMING O...
- Publication number 20090290424
- Publication date Nov 26, 2009
- Atmel Corporation
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Application
ERASE VERIFY FOR MEMORY DEVICES
- Publication number 20080310232
- Publication date Dec 18, 2008
- Atmel Corporation
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD TO MANAGE EXTERNAL VOLTAGE FOR SEMICONDUCTOR M...
- Publication number 20080246504
- Publication date Oct 9, 2008
- ATMEL CORPORATION
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Application
FLEXIBLE, LOW COST APPARATUS AND METHOD TO INTRODUCE AND CHECK ALGO...
- Publication number 20080250191
- Publication date Oct 9, 2008
- ATMEL CORPORATION
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Application
ERASE VERIFY METHOD FOR NAND-TYPE FLASH MEMORIES
- Publication number 20080165585
- Publication date Jul 10, 2008
- ATMEL CORPORATION
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND DEVICE FOR MANAGING A POWER SUPPLY POWER-ON SEQUENCE
- Publication number 20080143395
- Publication date Jun 19, 2008
- ATMEL CORPORATION
- Massimiliano Frulio
- G11 - INFORMATION STORAGE
Information Patent Application
IMPLEMENTATION OF COLUMN REDUNDANCY FOR A FLASH MEMORY WITH A HIGH...
- Publication number 20080144379
- Publication date Jun 19, 2008
- ATMEL CORPORATION
- Simone Bartoli
- G11 - INFORMATION STORAGE
Information Patent Application
LOW VOLTAGE COLUMN DECODER SHARING A MEMORY ARRAY P-WELL
- Publication number 20080123415
- Publication date May 29, 2008
- ATMEL CORPORATION
- Massimiliano Frulio
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE GATE VOLTAGE REGULATION
- Publication number 20080101133
- Publication date May 1, 2008
- ATMEL CORPORATION
- Stefano Sivero
- G11 - INFORMATION STORAGE
Information Patent Application
System for configuring parameters for a flash memory
- Publication number 20070083699
- Publication date Apr 12, 2007
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Application
Method and system for program pulse generation during programming o...
- Publication number 20060250851
- Publication date Nov 9, 2006
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Application
Method and system for configuring parameters for flash memory
- Publication number 20060253644
- Publication date Nov 9, 2006
- Stefano Surico
- G11 - INFORMATION STORAGE
Information Patent Application
Method and system for managing a suspend request in a flash memory
- Publication number 20060161727
- Publication date Jul 20, 2006
- Stefano Surico
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System for performing fast testing during flash reference cell setting
- Publication number 20060140030
- Publication date Jun 29, 2006
- Lorenzo Bedarida
- G11 - INFORMATION STORAGE
Information Patent Application
Method and system for managing address bits during buffered program...
- Publication number 20060085622
- Publication date Apr 20, 2006
- Simone Bartoli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for a programming approach for a nonvolatile elec...
- Publication number 20060077714
- Publication date Apr 13, 2006
- Stefano Surico
- G11 - INFORMATION STORAGE

Stefano Surico

Person

Patents Grantslast 30 patents

Method and system for program pulse generation during programming o...

Method and system for program pulse generation during programming o...

Erase verify for memory devices

Flexible, low cost apparatus and method to introduce and check algo...

Method and device for managing a power supply power-on sequence

Method and system for program pulse generation during programming o...

Implementation of column redundancy for a flash memory with a high...

Apparatus and method to manage external voltage for semiconductor m...

Low voltage column decoder sharing a memory array p-well

Adaptive gate voltage regulation

Method and system for managing address bits during buffered program...

Method and system for a programming approach for a nonvolatile elec...

Method and system for managing a suspend request in a flash memory

System for configuring parameters for a flash memory

Method and system for configuring parameters for flash memory

System for performing fast testing during flash reference cell setting

Patents Applicationslast 30 patents

METHOD AND SYSTEM FOR PROGRAM PULSE GENERATION DURING PROGRAMMING O...

METHOD AND SYSTEM FOR PROGRAM PULSE GENERATION DURING PROGRAMMING O...

ERASE VERIFY FOR MEMORY DEVICES

APPARATUS AND METHOD TO MANAGE EXTERNAL VOLTAGE FOR SEMICONDUCTOR M...

FLEXIBLE, LOW COST APPARATUS AND METHOD TO INTRODUCE AND CHECK ALGO...

ERASE VERIFY METHOD FOR NAND-TYPE FLASH MEMORIES

METHOD AND DEVICE FOR MANAGING A POWER SUPPLY POWER-ON SEQUENCE

IMPLEMENTATION OF COLUMN REDUNDANCY FOR A FLASH MEMORY WITH A HIGH...

LOW VOLTAGE COLUMN DECODER SHARING A MEMORY ARRAY P-WELL

ADAPTIVE GATE VOLTAGE REGULATION

System for configuring parameters for a flash memory

Method and system for program pulse generation during programming o...

Method and system for configuring parameters for flash memory

Method and system for managing a suspend request in a flash memory

System for performing fast testing during flash reference cell setting

Method and system for managing address bits during buffered program...

Method and system for a programming approach for a nonvolatile elec...