Stefano Tonello

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Breganze, IT

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Patents Grantslast 30 patents

Information Patent Grant
Test cells for semiconductor yield improvement
- Patent number 7,807,480
- Issue date Oct 5, 2010
- PDF Solutions, Inc.
- Brian Stine
- G11 - INFORMATION STORAGE
Information Patent Grant
Layout for DUT arrays used in semiconductor wafer testing
- Patent number 7,489,151
- Issue date Feb 10, 2009
- PDF Solutions, Inc.
- Christopher Hess
- G01 - MEASURING TESTING
Information Patent Grant
Designing an integrated circuit to improve yield using a variant de...
- Patent number 7,487,474
- Issue date Feb 3, 2009
- PDF Solutions, Inc.
- Dennis Ciplickas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power RAM memory cell using a precharge line pulse during write...
- Patent number 6,380,592
- Issue date Apr 30, 2002
- STMicroelectronics S.r.l.
- Michael Tooher
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
LAYOUT FOR DUT ARRAYS USED IN SEMICONDUCTOR WAFER TESTING
- Publication number 20090140762
- Publication date Jun 4, 2009
- PDF Solutions, Inc.
- Christopher Hess
- G01 - MEASURING TESTING
Information Patent Application
Test Cells for semiconductor yield improvement
- Publication number 20080169466
- Publication date Jul 17, 2008
- PDF Solutions, Inc.
- Brian Stine
- G01 - MEASURING TESTING
Information Patent Application
Layout for DUT arrays used in semiconductor wafer testing
- Publication number 20070075718
- Publication date Apr 5, 2007
- PDF Solutions, Inc.
- Christopher Hess
- G01 - MEASURING TESTING
Information Patent Application
Yield improvement
- Publication number 20060101355
- Publication date May 11, 2006
- PDF Solutions, Inc.
- Dennis Ciplickas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER RAM MEMORY CELL USING A PRECHARGE LINE PULSE DURING WRITE...
- Publication number 20020003244
- Publication date Jan 10, 2002
- MICHAEL TOOHER
- G11 - INFORMATION STORAGE