Stephan D. KRONHOLZ

Person

Dresden, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Epitaxial channel formation methods and structures
- Patent number 9,548,378
- Issue date Jan 17, 2017
- GLOBALFOUNDRIES, INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Performance enhancement in transistors by providing an embedded str...
- Patent number 9,484,459
- Issue date Nov 1, 2016
- GLOBALFOUNDRIES Inc.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integration of semiconductor alloys in PMOS and NMOS transistors by...
- Patent number 9,269,631
- Issue date Feb 23, 2016
- Advance Micro Devices, Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strain engineering in semiconductor devices by using a piezoelectri...
- Patent number 9,263,582
- Issue date Feb 16, 2016
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Performance enhancement in transistors by providing an embedded str...
- Patent number 9,224,863
- Issue date Dec 29, 2015
- GLOBALFOUNDRIES Inc.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming silicon/germanium protection layer above source/...
- Patent number 9,029,919
- Issue date May 12, 2015
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Horizontal epitaxy furnace for channel SiGe formation
- Patent number 9,018,065
- Issue date Apr 28, 2015
- GLOBALFOUNDRIES Inc.
- Joanna Wasyluk
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Transistor with embedded Si/Ge material having reduced offset and s...
- Patent number 9,006,835
- Issue date Apr 14, 2015
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High-K metal gate electrode structures formed by cap layer removal...
- Patent number 8,987,144
- Issue date Mar 24, 2015
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a layer of silicon on a layer of silicon/germanium
- Patent number 8,969,190
- Issue date Mar 3, 2015
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strain enhancement in transistors comprising an embedded strain-ind...
- Patent number 8,969,916
- Issue date Mar 3, 2015
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduction of defect rates in PFET transistors comprising a Si/Ge se...
- Patent number 8,939,765
- Issue date Jan 27, 2015
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strain engineering in semiconductor devices by using a piezoelectri...
- Patent number 8,884,379
- Issue date Nov 11, 2014
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional semiconductor device comprising an inter-die conn...
- Patent number 8,847,404
- Issue date Sep 30, 2014
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Complementary transistors comprising high-k metal gate electrode st...
- Patent number 8,835,209
- Issue date Sep 16, 2014
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing defect rate during deposition of a channel semiconductor a...
- Patent number 8,836,047
- Issue date Sep 16, 2014
- GLOBALFOUNDRIES Inc.
- Stephan-Detlef Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
PMOS threshold voltage control by germanium implantation
- Patent number 8,828,816
- Issue date Sep 9, 2014
- GLOBALFOUNDRIES Inc.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor comprising an embedded sigma shaped sequentially formed...
- Patent number 8,809,151
- Issue date Aug 19, 2014
- GLOBALFOUNDRIES Inc.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of epitaxially forming materials on transistor devices
- Patent number 8,796,080
- Issue date Aug 5, 2014
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Oxide deposition by using a double liner approach for reducing patt...
- Patent number 8,772,843
- Issue date Jul 8, 2014
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sophisticated gate electrode structures formed by cap layer removal...
- Patent number 8,765,559
- Issue date Jul 1, 2014
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a semiconductor device while preventing or reduc...
- Patent number 8,765,542
- Issue date Jul 1, 2014
- GLOBALFOUNDRIES Inc.
- Joachim Patzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices comprising a channel semiconductor alloy form...
- Patent number 8,748,275
- Issue date Jun 10, 2014
- GLOBALFOUNDRIES Inc.
- Hans-Juergen Thees
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Adjusting of a non-silicon fraction in a semiconductor alloy during...
- Patent number 8,735,253
- Issue date May 27, 2014
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming PEET devices with different structures and perfo...
- Patent number 8,735,303
- Issue date May 27, 2014
- GLOBALFOUNDRIES Inc.
- Hans-Juergen Thees
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded sigma-shaped semiconductor alloys formed in transistors by...
- Patent number 8,728,896
- Issue date May 20, 2014
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of protecting STI structures from erosion during processing...
- Patent number 8,722,479
- Issue date May 13, 2014
- GLOBALFOUNDRIES Inc.
- Hans-Juergen Thees
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhancing deposition uniformity of a channel semiconductor alloy by...
- Patent number 8,722,486
- Issue date May 13, 2014
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Superior integrity of high-k metal gate stacks by preserving a resi...
- Patent number 8,722,481
- Issue date May 13, 2014
- GLOBALFOUNDRIES Inc.
- Stephan-Detlef Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for PFET fabrication using APM solutions
- Patent number 8,703,620
- Issue date Apr 22, 2014
- GLOBALFOUNDRIES, INC.
- Joanna Wasyluk
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PERFORMANCE ENHANCEMENT IN TRANSISTORS BY PROVIDING AN EMBEDDED STR...
- Publication number 20160071978
- Publication date Mar 10, 2016
- GLOBALFOUNDRIES INC.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRAIN ENGINEERING IN SEMICONDUCTOR DEVICES BY USING A PIEZOELECTRI...
- Publication number 20150054083
- Publication date Feb 26, 2015
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRAIN ENHANCEMENT IN TRANSISTORS COMPRISING AN EMBEDDED STRAIN-IND...
- Publication number 20140339604
- Publication date Nov 20, 2014
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING SILICON/GERMANIUM PROTECTION LAYER ABOVE SOURCE/...
- Publication number 20140217480
- Publication date Aug 7, 2014
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PFET DEVICES WITH DIFFERENT STRUCTURES AND PERFORMANCE CHARACTERISTICS
- Publication number 20140191332
- Publication date Jul 10, 2014
- GLOBALFOUNDRIES INC.
- Hans-Juergen Thees
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR WITH EMBEDDED SI/GE MATERIAL HAVING REDUCED OFFSET AND S...
- Publication number 20140131805
- Publication date May 15, 2014
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING A LAYER OF SILICON ON A LAYER OF SILICON/GERMANIUM
- Publication number 20140057415
- Publication date Feb 27, 2014
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUPERIOR STABILITY OF CHARACTERISTICS OF TRANSISTORS HAVING AN EARL...
- Publication number 20130316511
- Publication date Nov 28, 2013
- GLOBALFOUNDRIES INC.
- Markus Lenski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ADJUSTING OF STRAIN CAUSED IN A TRANSISTOR CHANNEL BY SEMICONDUCTOR...
- Publication number 20130307090
- Publication date Nov 21, 2013
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TMAH RECESS FOR SILICON GERMANIUM IN POSITIVE CHANNEL REGION FOR CM...
- Publication number 20130299874
- Publication date Nov 14, 2013
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Joanna Wasyluk
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HORIZONTAL EPITAXY FURNACE FOR CHANNEL SIGE FORMATION
- Publication number 20130302973
- Publication date Nov 14, 2013
- GLOBALFOUNDRIES Inc.
- Joanna Wasyluk
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
SUPERIOR INTEGRITY OF HIGH-K METAL GATE STACKS BY PRESERVING A RESI...
- Publication number 20130267044
- Publication date Oct 10, 2013
- GLOBALFOUNDRIES INC.
- Stephan-Detlef KRONHOLZ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL SEMICONDUCTOR DEVICE COMPRISING AN INTER-DIE CONN...
- Publication number 20130221540
- Publication date Aug 29, 2013
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES B...
- Publication number 20130221478
- Publication date Aug 29, 2013
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES
- Publication number 20130214381
- Publication date Aug 22, 2013
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING STEPPED ISOLATION STRUCTURES FOR SEMICONDUCTOR D...
- Publication number 20130214392
- Publication date Aug 22, 2013
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EPITAXIAL CHANNEL FORMATION METHODS AND STRUCTURES
- Publication number 20130210216
- Publication date Aug 15, 2013
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR PFET FABRICATION USING APM SOLUTIONS
- Publication number 20130203244
- Publication date Aug 8, 2013
- GLOBALFOUNDRIES INC.
- Joanna Wasyluk
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR PFET FABRICATION USING APM SOLUTIONS
- Publication number 20130203245
- Publication date Aug 8, 2013
- GLOBALFOUNDRIES INC.
- Joanna WASYLUK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NFET Device with Tensile Stressed Channel Region and Methods of For...
- Publication number 20130175577
- Publication date Jul 11, 2013
- GLOBALFOUNDRIES INC.
- Chung Foong Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Forming Faceted Stress-Inducing Stressors Proximate the...
- Publication number 20130175585
- Publication date Jul 11, 2013
- GLOBALFOUNDRIES INC.
- Chung Foong Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCTION OF THICKNESS VARIATIONS OF A THRESHOLD SEMICONDUCTOR ALLO...
- Publication number 20130161695
- Publication date Jun 27, 2013
- Advanced Micro Devices, Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRAIN ENHANCEMENT IN TRANSISTORS COMPRISING AN EMBEDDED STRAIN-IND...
- Publication number 20130130449
- Publication date May 23, 2013
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH REDUCED THRESHOLD VARIABILITY HAVING A TH...
- Publication number 20130113019
- Publication date May 9, 2013
- GLOBALFOUNDRIES INC.
- Carsten Reichel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Forming PFET Devices With Different Structures and Perfo...
- Publication number 20130105900
- Publication date May 2, 2013
- GLOBALFOUNDRIES INC.
- Hans-Juergen Thees
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Epitaxially Forming Materials on Transistor Devices
- Publication number 20130105917
- Publication date May 2, 2013
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Superior Integrity of High-K Metal Gate Stacks by Preserving a Resi...
- Publication number 20130065329
- Publication date Mar 14, 2013
- GLOBALFOUNDRIES INC.
- Stephan-Detlef KRONHOLZ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMATION OF A CHANNEL SEMICONDUCTOR ALLOY BY FORMING A NITRIDE BAS...
- Publication number 20130040430
- Publication date Feb 14, 2013
- GLOBALFOUNDRIES INC.
- Rohit Pal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR WITH BOOT SHAPED SOURCE/DRAIN REGIONS
- Publication number 20130032864
- Publication date Feb 7, 2013
- GLOBALFOUNDRIES INC.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PERFORMANCE ENHANCEMENT IN TRANSISTORS BY PROVIDING AN EMBEDDED STR...
- Publication number 20120305995
- Publication date Dec 6, 2012
- GLOBALFOUNDRIES INC.
- Peter Javorka
- H01 - BASIC ELECTRIC ELEMENTS

Stephan D. KRONHOLZ

Person

Patents Grantslast 30 patents

Epitaxial channel formation methods and structures

Performance enhancement in transistors by providing an embedded str...

Integration of semiconductor alloys in PMOS and NMOS transistors by...

Strain engineering in semiconductor devices by using a piezoelectri...

Performance enhancement in transistors by providing an embedded str...

Methods of forming silicon/germanium protection layer above source/...

Horizontal epitaxy furnace for channel SiGe formation

Transistor with embedded Si/Ge material having reduced offset and s...

High-K metal gate electrode structures formed by cap layer removal...

Methods of forming a layer of silicon on a layer of silicon/germanium

Strain enhancement in transistors comprising an embedded strain-ind...

Reduction of defect rates in PFET transistors comprising a Si/Ge se...

Strain engineering in semiconductor devices by using a piezoelectri...

Three-dimensional semiconductor device comprising an inter-die conn...

Complementary transistors comprising high-k metal gate electrode st...

Reducing defect rate during deposition of a channel semiconductor a...

PMOS threshold voltage control by germanium implantation

Transistor comprising an embedded sigma shaped sequentially formed...

Methods of epitaxially forming materials on transistor devices

Oxide deposition by using a double liner approach for reducing patt...

Sophisticated gate electrode structures formed by cap layer removal...

Methods of forming a semiconductor device while preventing or reduc...

Semiconductor devices comprising a channel semiconductor alloy form...

Adjusting of a non-silicon fraction in a semiconductor alloy during...

Methods of forming PEET devices with different structures and perfo...

Embedded sigma-shaped semiconductor alloys formed in transistors by...

Method of protecting STI structures from erosion during processing...

Enhancing deposition uniformity of a channel semiconductor alloy by...

Superior integrity of high-k metal gate stacks by preserving a resi...

Methods for PFET fabrication using APM solutions

Patents Applicationslast 30 patents

PERFORMANCE ENHANCEMENT IN TRANSISTORS BY PROVIDING AN EMBEDDED STR...

STRAIN ENGINEERING IN SEMICONDUCTOR DEVICES BY USING A PIEZOELECTRI...

STRAIN ENHANCEMENT IN TRANSISTORS COMPRISING AN EMBEDDED STRAIN-IND...

METHODS OF FORMING SILICON/GERMANIUM PROTECTION LAYER ABOVE SOURCE/...

PFET DEVICES WITH DIFFERENT STRUCTURES AND PERFORMANCE CHARACTERISTICS

TRANSISTOR WITH EMBEDDED SI/GE MATERIAL HAVING REDUCED OFFSET AND S...

METHODS OF FORMING A LAYER OF SILICON ON A LAYER OF SILICON/GERMANIUM

SUPERIOR STABILITY OF CHARACTERISTICS OF TRANSISTORS HAVING AN EARL...

ADJUSTING OF STRAIN CAUSED IN A TRANSISTOR CHANNEL BY SEMICONDUCTOR...

TMAH RECESS FOR SILICON GERMANIUM IN POSITIVE CHANNEL REGION FOR CM...

HORIZONTAL EPITAXY FURNACE FOR CHANNEL SIGE FORMATION

SUPERIOR INTEGRITY OF HIGH-K METAL GATE STACKS BY PRESERVING A RESI...

THREE-DIMENSIONAL SEMICONDUCTOR DEVICE COMPRISING AN INTER-DIE CONN...

METHODS OF FORMING ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES B...

METHODS OF FORMING ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES

METHODS OF FORMING STEPPED ISOLATION STRUCTURES FOR SEMICONDUCTOR D...

EPITAXIAL CHANNEL FORMATION METHODS AND STRUCTURES

METHODS FOR PFET FABRICATION USING APM SOLUTIONS

METHODS FOR PFET FABRICATION USING APM SOLUTIONS

NFET Device with Tensile Stressed Channel Region and Methods of For...

Methods of Forming Faceted Stress-Inducing Stressors Proximate the...

REDUCTION OF THICKNESS VARIATIONS OF A THRESHOLD SEMICONDUCTOR ALLO...

STRAIN ENHANCEMENT IN TRANSISTORS COMPRISING AN EMBEDDED STRAIN-IND...

SEMICONDUCTOR DEVICE WITH REDUCED THRESHOLD VARIABILITY HAVING A TH...

Methods of Forming PFET Devices With Different Structures and Perfo...

Methods of Epitaxially Forming Materials on Transistor Devices

Superior Integrity of High-K Metal Gate Stacks by Preserving a Resi...

FORMATION OF A CHANNEL SEMICONDUCTOR ALLOY BY FORMING A NITRIDE BAS...

TRANSISTOR WITH BOOT SHAPED SOURCE/DRAIN REGIONS

PERFORMANCE ENHANCEMENT IN TRANSISTORS BY PROVIDING AN EMBEDDED STR...