Stephan Gaskins

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for waking a single core of a multi-core micro...
- Patent number 10,108,431
- Issue date Oct 23, 2018
- Via Technologies, Inc.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective designation of multiple cores as bootstrap processor in a...
- Patent number 9,971,605
- Issue date May 15, 2018
- Via Technologies, Inc.
- G. Glenn Henry
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Cache memory diagnostic writeback
- Patent number 9,911,508
- Issue date Mar 6, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G11 - INFORMATION STORAGE
Information Patent Grant
Propagation of updates to per-core-instantiated architecturally-vis...
- Patent number 9,891,928
- Issue date Feb 13, 2018
- Via Technologies, Inc.
- G. Glenn Henry
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Inter-core communication via uncore RAM
- Patent number 9,891,927
- Issue date Feb 13, 2018
- Via Technologies, Inc.
- G. Glenn Henry
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Core ID designation system for dynamically designated bootstrap pro...
- Patent number 9,811,344
- Issue date Nov 7, 2017
- Via Technologies, Inc.
- G. Glenn Henry
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Propagation of microcode patches to multiple cores in multicore mic...
- Patent number 9,792,112
- Issue date Oct 17, 2017
- Via Technologies, Inc.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-core data array power gating restoral mechanism
- Patent number 9,690,511
- Issue date Jun 27, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for repairing cache arrays in a multi-core mic...
- Patent number 9,665,490
- Issue date May 30, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core apparatus and method for restoring data arrays following...
- Patent number 9,606,933
- Issue date Mar 28, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core microprocessor power gating cache restoral programming m...
- Patent number 9,594,690
- Issue date Mar 14, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core programming apparatus and method for restoring data arra...
- Patent number 9,594,691
- Issue date Mar 14, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core data array power gating cache restoral programming mecha...
- Patent number 9,582,429
- Issue date Feb 28, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core programming apparatus and method for restoring data arra...
- Patent number 9,582,428
- Issue date Feb 28, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Propagation of updates to per-core-instantiated architecturally-vis...
- Patent number 9,575,541
- Issue date Feb 21, 2017
- Via Technologies, Inc.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-core microprocessor that dynamically designates one of its pr...
- Patent number 9,535,488
- Issue date Jan 3, 2017
- Via Technologies, Inc.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-core microprocessor power gating cache restoral mechanism
- Patent number 9,524,241
- Issue date Dec 20, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Single core wakeup multi-core synchronization mechanism
- Patent number 9,507,404
- Issue date Nov 29, 2016
- Via Technologies, Inc.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Service processor patch mechanism
- Patent number 9,471,133
- Issue date Oct 18, 2016
- Via Technologies, Inc.
- G. Glenn Henry
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Multi-core data array power gating restoral mechanism
- Patent number 9,395,802
- Issue date Jul 19, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Reconfigurably designating master core for conditional output on si...
- Patent number 9,367,497
- Issue date Jun 14, 2016
- Via Technologies, Inc.
- G. Glenn Henry
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Multi-core processor with core selectively disabled by kill instruc...
- Patent number 8,972,707
- Issue date Mar 3, 2015
- Via Technologies, Inc.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with multicore processor power credit management fea...
- Patent number 8,935,549
- Issue date Jan 13, 2015
- Via Technologies, Inc.
- G. Glenn Henry
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Multicore processor power credit management in which multiple proce...
- Patent number 8,914,661
- Issue date Dec 16, 2014
- Via Technologies, Inc.
- G. Glenn Henry
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Multicore processor power credit management to allow all processing...
- Patent number 8,615,672
- Issue date Dec 24, 2013
- Via Technologies, Inc.
- G. Glenn Henry
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Detection of fuse re-growth in a microprocessor
- Patent number 8,281,223
- Issue date Oct 2, 2012
- Via Technologies, Inc.
- Darius D. Gaskins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detection of uncorrectable re-grown fuses in a microprocessor
- Patent number 8,276,032
- Issue date Sep 25, 2012
- Via Technologies, Inc.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor that performs adaptive power throttling
- Patent number 8,176,347
- Issue date May 8, 2012
- Via Technologies, Inc.
- Darius D. Gaskins
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Microprocessor that performs adaptive power throttling
- Patent number 8,135,970
- Issue date Mar 13, 2012
- Via Technologies, Inc.
- Darius D. Gaskins
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Microprocessor capable of dynamically increasing its performance in...
- Patent number 7,774,627
- Issue date Aug 10, 2010
- VIA Technologies, Inc.
- Darius D. Gaskins
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTI-CORE MICROPROCESSOR THAT DYNAMICALLY DESIGNATES ONE OF ITS PR...
- Publication number 20170068546
- Publication date Mar 9, 2017
- VIA TECHNOLOGIES, INC.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SINGLE-CORE WAKEUP MULTI-CORE SYNCHRONIZATION MECHANISM
- Publication number 20170003707
- Publication date Jan 5, 2017
- VIA TECHNOLOGIES, INC.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROPAGATION OF UPDATES TO PER-CORE-INSTANTIATED ARCHITECTURALLY-VIS...
- Publication number 20160349824
- Publication date Dec 1, 2016
- VIA TECHNOLOGIES, INC.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE DATA ARRAY POWER GATING RESTORAL MECHANISM
- Publication number 20160350022
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MEMORY DIAGNOSTIC WRITEBACK
- Publication number 20160293273
- Publication date Oct 6, 2016
- VIA Alliance Semiconductor Co., Ltd.
- RODNEY E. HOOKER
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-CORE PROGRAMMING APPARATUS AND METHOD FOR RESTORING DATA ARRA...
- Publication number 20160179692
- Publication date Jun 23, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE DATA ARRAY POWER GATING CACHE RESTORAL PROGRAMMING MECHA...
- Publication number 20160179690
- Publication date Jun 23, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE MICROPROCESSOR POWER GATING CACHE RESTORAL PROGRAMMING M...
- Publication number 20160179691
- Publication date Jun 23, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE PROGRAMMING APPARATUS AND METHOD FOR RESTORING DATA ARRA...
- Publication number 20160179689
- Publication date Jun 23, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE APPARATUS AND METHOD FOR RESTORING DATA ARRAYS FOLLOWING...
- Publication number 20150338904
- Publication date Nov 26, 2015
- VIA TECHNOLOGIES, INC.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE DATA ARRAY POWER GATING RESTORAL MECHANISM
- Publication number 20150338905
- Publication date Nov 26, 2015
- VIA TECHNOLOGIES, INC.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE MICROPROCESSOR POWER GATING CACHE RESTORAL MECHANISM
- Publication number 20150339231
- Publication date Nov 26, 2015
- VIA TECHNOLOGIES, INC.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR REPAIRING CACHE ARRAYS IN A MULTI-CORE MIC...
- Publication number 20150339232
- Publication date Nov 26, 2015
- VIA TECHNOLOGIES, INC.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC CACHE ENLARGING BY COUNTING EVICTIONS
- Publication number 20150212947
- Publication date Jul 30, 2015
- VIA TECHNOLOGIES, INC.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROPAGATION OF UPDATES TO PER-CORE-INSTANTIATED ARCHITECTURALLY-VIS...
- Publication number 20150067307
- Publication date Mar 5, 2015
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SERVICE PROCESSOR PATCH MECHANISM
- Publication number 20150067263
- Publication date Mar 5, 2015
- VIA TECHNOLOGIES, INC.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SINGLE-CORE WAKEUP MULTI-CORE SYNCHRONIZATION MECHANISM
- Publication number 20150067214
- Publication date Mar 5, 2015
- VIA TECHNOLOGIES, INC.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROPAGATION OF MICROCODE PATCHES TO MULTIPLE CORES IN MULTICORE MIC...
- Publication number 20150067666
- Publication date Mar 5, 2015
- VIA TECHNOLOGIES, INC.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC DESIGNATION OF THE BOOTSTRAP PROCESSOR IN A MULTI-CORE MICR...
- Publication number 20150067219
- Publication date Mar 5, 2015
- VIA TECHNOLOGIES, INC.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTER-CORE COMMUNICATION VIA UNCORE RAM
- Publication number 20150067306
- Publication date Mar 5, 2015
- VIA TECHNOLOGIES, INC.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE DESIGNATION OF MULTIPLE CORES AS BOOTSTRAP PROCESSOR IN A...
- Publication number 20150067318
- Publication date Mar 5, 2015
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC AND SELECTIVE CORE DISABLEMENT AND RECONFIGURATION IN A MUL...
- Publication number 20150046680
- Publication date Feb 12, 2015
- VIA TECHNOLOGIES, INC.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC AND SELECTIVE CORE DISABLEMENT AND RECONFIGURATION IN A MUL...
- Publication number 20120166764
- Publication date Jun 28, 2012
- VIA TECHNOLOGIES, INC.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICORE PROCESSOR POWER CREDIT MANAGEMENT TO ALLOW ALL PROCESSING...
- Publication number 20120047385
- Publication date Feb 23, 2012
- VIA TECHNOLOGIES, INC.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICORE PROCESSOR POWER CREDIT MANAGEMENT BY DIRECTLY MEASURING P...
- Publication number 20120047377
- Publication date Feb 23, 2012
- VIA TECHNOLOGIES, INC.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICORE PROCESSOR POWER CREDIT MANAGEMENT IN WHICH MULTIPLE PROCE...
- Publication number 20120005514
- Publication date Jan 5, 2012
- VIA TECHNOLOGIES, INC.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTION OF FUSE RE-GROWTH IN A MICROPROCESSOR
- Publication number 20110035623
- Publication date Feb 10, 2011
- VIA Technologies, Inc.
- Darius D. Gaskins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTION OF UNCORRECTABLE RE-GROWN FUSES IN A MICROPROCESSOR
- Publication number 20110035616
- Publication date Feb 10, 2011
- VIA Technologies, Inc.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICROPROCESSOR THAT PERFORMS ADAPTIVE POWER THROTTLING
- Publication number 20100229012
- Publication date Sep 9, 2010
- VIA Technologies, Inc.
- Darius D. Gaskins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICROPROCESSOR CAPABLE OF DYNAMICALLY INCREASING ITS PERFORMANCE IN...
- Publication number 20070255972
- Publication date Nov 1, 2007
- VIA Technologies, Inc.
- Darius D. Gaskins
- G06 - COMPUTING CALCULATING COUNTING

Stephan Gaskins

Person

Patents Grantslast 30 patents

Method and apparatus for waking a single core of a multi-core micro...

Selective designation of multiple cores as bootstrap processor in a...

Cache memory diagnostic writeback

Propagation of updates to per-core-instantiated architecturally-vis...

Inter-core communication via uncore RAM

Core ID designation system for dynamically designated bootstrap pro...

Propagation of microcode patches to multiple cores in multicore mic...

Multi-core data array power gating restoral mechanism

Apparatus and method for repairing cache arrays in a multi-core mic...

Multi-core apparatus and method for restoring data arrays following...

Multi-core microprocessor power gating cache restoral programming m...

Multi-core programming apparatus and method for restoring data arra...

Multi-core data array power gating cache restoral programming mecha...

Multi-core programming apparatus and method for restoring data arra...

Propagation of updates to per-core-instantiated architecturally-vis...

Multi-core microprocessor that dynamically designates one of its pr...

Multi-core microprocessor power gating cache restoral mechanism

Single core wakeup multi-core synchronization mechanism

Service processor patch mechanism

Multi-core data array power gating restoral mechanism

Reconfigurably designating master core for conditional output on si...

Multi-core processor with core selectively disabled by kill instruc...

Microprocessor with multicore processor power credit management fea...

Multicore processor power credit management in which multiple proce...

Multicore processor power credit management to allow all processing...

Detection of fuse re-growth in a microprocessor

Detection of uncorrectable re-grown fuses in a microprocessor

Microprocessor that performs adaptive power throttling

Microprocessor that performs adaptive power throttling

Microprocessor capable of dynamically increasing its performance in...

Patents Applicationslast 30 patents

MULTI-CORE MICROPROCESSOR THAT DYNAMICALLY DESIGNATES ONE OF ITS PR...

SINGLE-CORE WAKEUP MULTI-CORE SYNCHRONIZATION MECHANISM

PROPAGATION OF UPDATES TO PER-CORE-INSTANTIATED ARCHITECTURALLY-VIS...

MULTI-CORE DATA ARRAY POWER GATING RESTORAL MECHANISM

CACHE MEMORY DIAGNOSTIC WRITEBACK

MULTI-CORE PROGRAMMING APPARATUS AND METHOD FOR RESTORING DATA ARRA...

MULTI-CORE DATA ARRAY POWER GATING CACHE RESTORAL PROGRAMMING MECHA...

MULTI-CORE MICROPROCESSOR POWER GATING CACHE RESTORAL PROGRAMMING M...

MULTI-CORE PROGRAMMING APPARATUS AND METHOD FOR RESTORING DATA ARRA...

MULTI-CORE APPARATUS AND METHOD FOR RESTORING DATA ARRAYS FOLLOWING...

MULTI-CORE DATA ARRAY POWER GATING RESTORAL MECHANISM

MULTI-CORE MICROPROCESSOR POWER GATING CACHE RESTORAL MECHANISM

APPARATUS AND METHOD FOR REPAIRING CACHE ARRAYS IN A MULTI-CORE MIC...

DYNAMIC CACHE ENLARGING BY COUNTING EVICTIONS

PROPAGATION OF UPDATES TO PER-CORE-INSTANTIATED ARCHITECTURALLY-VIS...

SERVICE PROCESSOR PATCH MECHANISM

SINGLE-CORE WAKEUP MULTI-CORE SYNCHRONIZATION MECHANISM

PROPAGATION OF MICROCODE PATCHES TO MULTIPLE CORES IN MULTICORE MIC...

DYNAMIC DESIGNATION OF THE BOOTSTRAP PROCESSOR IN A MULTI-CORE MICR...

INTER-CORE COMMUNICATION VIA UNCORE RAM

SELECTIVE DESIGNATION OF MULTIPLE CORES AS BOOTSTRAP PROCESSOR IN A...

DYNAMIC AND SELECTIVE CORE DISABLEMENT AND RECONFIGURATION IN A MUL...

DYNAMIC AND SELECTIVE CORE DISABLEMENT AND RECONFIGURATION IN A MUL...

MULTICORE PROCESSOR POWER CREDIT MANAGEMENT TO ALLOW ALL PROCESSING...

MULTICORE PROCESSOR POWER CREDIT MANAGEMENT BY DIRECTLY MEASURING P...

MULTICORE PROCESSOR POWER CREDIT MANAGEMENT IN WHICH MULTIPLE PROCE...

DETECTION OF FUSE RE-GROWTH IN A MICROPROCESSOR

DETECTION OF UNCORRECTABLE RE-GROWN FUSES IN A MICROPROCESSOR

MICROPROCESSOR THAT PERFORMS ADAPTIVE POWER THROTTLING

MICROPROCESSOR CAPABLE OF DYNAMICALLY INCREASING ITS PERFORMANCE IN...