Stephen C. Joy

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods of fabricating a via-in-pad with off-center geometry
- Patent number 7,208,348
- Issue date Apr 24, 2007
- Intel Corporation
- Phil Geng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods to couple integrated circuit packages to bonding pads havin...
- Patent number 7,036,712
- Issue date May 2, 2006
- Intel Corporation
- Stephen C. Joy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Via-in-pad with off-center geometry
- Patent number 6,833,615
- Issue date Dec 21, 2004
- Intel Corporation
- Phil Geng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Via-in-pad apparatus and methods
- Patent number 6,429,389
- Issue date Aug 6, 2002
- Intel Corporation
- Ji Yoon Chung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for improving circuit board solder
- Patent number 6,429,383
- Issue date Aug 6, 2002
- Intel Corporation
- John T. Sprietsma
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Apparatus for coupling integrated circuit packages to bonding pads...
- Patent number 6,395,995
- Issue date May 28, 2002
- Intel Corporation
- Stephen C. Joy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Printed circuit board multipack structure having internal gold fing...
- Patent number 6,359,233
- Issue date Mar 19, 2002
- Intel Corporation
- Steven C. Joy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multiple layer printed circuit board having power planes on outer l...
- Patent number 6,288,906
- Issue date Sep 11, 2001
- Intel Corporation
- John T. Sprietsma
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Computer card with a printed circuit board with vias providing stre...
- Patent number 6,046,909
- Issue date Apr 4, 2000
- Intel Corporation
- Stephen C. Joy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
Via-in-pad with off-center geometry and methods of manufacture
- Publication number 20050090040
- Publication date Apr 28, 2005
- Intel Corporation
- Phil Geng
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Method and apparatus for coupling integrated circuit packages to bo...
- Publication number 20020108777
- Publication date Aug 15, 2002
- Intel Corporation
- Stephen C. Joy
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Via -in-pad with off-center geometry and methods of manufacture
- Publication number 20020084105
- Publication date Jul 4, 2002
- Phil Geng
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Stephen C. Joy

Person

Patents Grantslast 30 patents

Methods of fabricating a via-in-pad with off-center geometry

Methods to couple integrated circuit packages to bonding pads havin...

Via-in-pad with off-center geometry

Via-in-pad apparatus and methods

Apparatus and method for improving circuit board solder

Apparatus for coupling integrated circuit packages to bonding pads...

Printed circuit board multipack structure having internal gold fing...

Multiple layer printed circuit board having power planes on outer l...

Computer card with a printed circuit board with vias providing stre...

Patents Applicationslast 30 patents

Via-in-pad with off-center geometry and methods of manufacture

Method and apparatus for coupling integrated circuit packages to bo...

Via -in-pad with off-center geometry and methods of manufacture