Stephen M. CEA

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Forksheet transistors with dielectric or conductive spine
- Patent number 12,243,875
- Issue date Mar 4, 2025
- Intel Corporation
- Seung Hoon Sung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Neighboring gate-all-around integrated circuit structures having co...
- Patent number 12,199,142
- Issue date Jan 14, 2025
- Intel Corporation
- Siddharth Chouksey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fin doping and integrated circuit structures resulting therefrom
- Patent number 12,199,098
- Issue date Jan 14, 2025
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wrap-around contact structures for semiconductor nanowires and nano...
- Patent number 12,176,429
- Issue date Dec 24, 2024
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanowire structures having non-discrete source and drain regions
- Patent number 12,125,916
- Issue date Oct 22, 2024
- Google LLC
- Stephen M. Cea
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Vertically stacked finFETs and shared gate patterning
- Patent number 12,100,623
- Issue date Sep 24, 2024
- Intel Corporation
- Aaron Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Extension of nanocomb transistor arrangements to implement gate all...
- Patent number 12,068,206
- Issue date Aug 20, 2024
- Intel Corporation
- Varun Mishra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned gate endcap (SAGE) architectures with gate-all-around...
- Patent number 12,057,491
- Issue date Aug 6, 2024
- Intel Corporation
- Biswajeet Guha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Channel structures with sub-fin dopant diffusion blocking layers
- Patent number 11,984,449
- Issue date May 14, 2024
- Intel Corporation
- Cory Bomberger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forksheet transistors with dielectric or conductive spine
- Patent number 11,923,370
- Issue date Mar 5, 2024
- Intel Corporation
- Seung Hoon Sung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sub-fin leakage reduction for template strained materials
- Patent number 11,923,412
- Issue date Mar 5, 2024
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor contact area enhancement
- Patent number 11,843,052
- Issue date Dec 12, 2023
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wrap-around contact structures for semiconductor nanowires and nano...
- Patent number 11,824,107
- Issue date Nov 21, 2023
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanowire structures having wrap-around contacts
- Patent number 11,757,026
- Issue date Sep 12, 2023
- Google LLC
- Stephen M. Cea
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Isolation schemes for gate-all-around transistor devices
- Patent number 11,705,518
- Issue date Jul 18, 2023
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Deep source and drain for transistor structures with back-side cont...
- Patent number 11,688,780
- Issue date Jun 27, 2023
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained tunable nanowire structures and process
- Patent number 11,676,965
- Issue date Jun 13, 2023
- Intel Corporation
- Stephen M. Cea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metallization structures under a semiconductor device layer
- Patent number 11,658,183
- Issue date May 23, 2023
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sub-fin leakage reduction for template strained materials
- Patent number 11,600,696
- Issue date Mar 7, 2023
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating CMOS FinFETs by selectively etching a straine...
- Patent number 11,581,406
- Issue date Feb 14, 2023
- Daedalus Prime LLC
- Stephen M. Cea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device, method and system to provide a stressed channel of a transi...
- Patent number 11,557,676
- Issue date Jan 17, 2023
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanowire structures having non-discrete source and drain regions
- Patent number 11,552,197
- Issue date Jan 10, 2023
- Google LLC
- Stephen M. Cea
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Gate-all-around integrated circuit structures having high mobility
- Patent number 11,538,806
- Issue date Dec 27, 2022
- Intel Corporation
- Roza Kotlyar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wrap-around contact structures for semiconductor nanowires and nano...
- Patent number 11,527,640
- Issue date Dec 13, 2022
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Removal of a bottom-most nanowire from a nanowire device stack
- Patent number 11,527,613
- Issue date Dec 13, 2022
- Intel Corporation
- Aaron Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around integrated circuit structures having vertically dis...
- Patent number 11,527,612
- Issue date Dec 13, 2022
- Intel Corporation
- Glenn Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical integration scheme and circuit elements architecture for a...
- Patent number 11,522,072
- Issue date Dec 6, 2022
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Channel structures with sub-fin dopant diffusion blocking layers
- Patent number 11,521,968
- Issue date Dec 6, 2022
- Intel Corporation
- Cory Bomberger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Increased transistor source/drain contact area using sacrificial so...
- Patent number 11,495,672
- Issue date Nov 8, 2022
- Intel Corporation
- Dax M. Crum
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple strain states in epitaxial transistor channel through the...
- Patent number 11,495,683
- Issue date Nov 8, 2022
- Intel Corporation
- Aaron Lilak
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
NEIGHBORING GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING CO...
- Publication number 20250107174
- Publication date Mar 27, 2025
- Intel Corporation
- Siddharth CHOUKSEY
Information Patent Application
SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH GATE-ALL-AROUND...
- Publication number 20240355903
- Publication date Oct 24, 2024
- Intel Corporation
- Biswajeet GUHA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EXTENSION OF NANOCOMB TRANSISTOR ARRANGEMENTS TO IMPLEMENT GATE ALL...
- Publication number 20240355682
- Publication date Oct 24, 2024
- Intel Corporation
- Varun Mishra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES WITH CAVITY SPACERS
- Publication number 20240186398
- Publication date Jun 6, 2024
- Intel Corporation
- Aaron D. LILAK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORKSHEET TRANSISTORS WITH DIELECTRIC OR CONDUCTIVE SPINE
- Publication number 20240153956
- Publication date May 9, 2024
- Intel Corporation
- Seung Hoon SUNG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING UNIFORM GRID METAL GATE AND TR...
- Publication number 20240105716
- Publication date Mar 28, 2024
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WRAP-AROUND CONTACT STRUCTURES FOR SEMICONDUCTOR NANOWIRES AND NANO...
- Publication number 20240047566
- Publication date Feb 8, 2024
- Intel Corporation
- Rishabh MEHANDRU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE SPACERS WITH ADJACENT UNIFORM EPITAXIAL MATERIAL
- Publication number 20230317822
- Publication date Oct 5, 2023
- Intel Corporation
- Stephen M. CEA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE CUT GRID ACROSS INTEGRATED CIRCUIT
- Publication number 20230275085
- Publication date Aug 31, 2023
- Intel Corporation
- Leonard P. Guler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH GATE PLUGS TO INDUCE COMPRESSIVE CHANNEL S...
- Publication number 20230207696
- Publication date Jun 29, 2023
- Mohammad HASAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING SOURCE OR DRAI...
- Publication number 20230207651
- Publication date Jun 29, 2023
- Mohammad HASAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUB-FIN LEAKAGE REDUCTION FOR TEMPLATE STRAINED MATERIALS
- Publication number 20230187492
- Publication date Jun 15, 2023
- Intel Corporation
- Rishabh MEHANDRU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS FINFET DEVICE HAVING STRAINED SIGE FINS AND A STRAINED SI CLAD...
- Publication number 20230170388
- Publication date Jun 1, 2023
- Daedalus Prime LLC
- Stephen M. Cea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING HIGH MOBILITY
- Publication number 20230116170
- Publication date Apr 13, 2023
- Intel Corporation
- Roza KOTLYAR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE, METHOD AND SYSTEM TO PROVIDE A STRESSED CHANNEL OF A TRANSI...
- Publication number 20230111329
- Publication date Apr 13, 2023
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SINGLE-SIDED NANOSHEET TRANSISTORS
- Publication number 20230114214
- Publication date Apr 13, 2023
- Intel Corporation
- Stephen Cea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nanowire Structures Having Non-Discrete Source and Drain Regions
- Publication number 20230111689
- Publication date Apr 13, 2023
- Google LLC
- Stephen M. Cea
- B82 - NANO-TECHNOLOGY
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING METAL-CONTAINING SOURCE OR DRA...
- Publication number 20230095007
- Publication date Mar 30, 2023
- Intel Corporation
- Rishabh MEHANDRU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SILICON RICH CAPPING LAYER PRE-AMORPHIZED WITH GERMANIUM AND BORON...
- Publication number 20230101725
- Publication date Mar 30, 2023
- Intel Corporation
- Debaleena NANDI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR STRUCTURES WITH REDUCED SOURCE/DRAIN LEAKAGE THROUGH BAC...
- Publication number 20230097948
- Publication date Mar 30, 2023
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DOPED SUBFIN
- Publication number 20230088753
- Publication date Mar 23, 2023
- Intel Corporation
- Stephen M. Cea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING VERTICALLY DIS...
- Publication number 20230074199
- Publication date Mar 9, 2023
- Intel Corporation
- Glenn GLASS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WRAP-AROUND CONTACT STRUCTURES FOR SEMICONDUCTOR NANOWIRES AND NANO...
- Publication number 20230068314
- Publication date Mar 2, 2023
- Intel Corporation
- Rishabh MEHANDRU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL INTEGRATION SCHEME AND CIRCUIT ELEMENTS ARCHITECTURE FOR A...
- Publication number 20230046755
- Publication date Feb 16, 2023
- Intel Corporation
- Rishabh MEHANDRU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHANNEL STRUCTURES WITH SUB-FIN DOPANT DIFFUSION BLOCKING LAYERS
- Publication number 20230043665
- Publication date Feb 9, 2023
- Intel Corporation
- Cory BOMBERGER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTORS WITH SOURCE & DRAIN ETCH STOP
- Publication number 20220415708
- Publication date Dec 29, 2022
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICALLY STACKED FINFETS & SHARED GATE PATTERNING
- Publication number 20220336284
- Publication date Oct 20, 2022
- Intel Corporation
- Aaron Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIN DOPING AND INTEGRATED CIRCUIT STRUCTURES RESULTING THEREFROM
- Publication number 20220310601
- Publication date Sep 29, 2022
- Intel Corporation
- Aaron D. LILAK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ISOLATION SCHEMES FOR GATE-ALL-AROUND TRANSISTOR DEVICES
- Publication number 20220246759
- Publication date Aug 4, 2022
- Intel Corporation
- RISHABH MEHANDRU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NEIGHBORING GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING CO...
- Publication number 20220199771
- Publication date Jun 23, 2022
- Intel Corporation
- Siddharth CHOUKSEY
- H01 - BASIC ELECTRIC ELEMENTS

Stephen M. CEA

Person

Patents Grantslast 30 patents

Forksheet transistors with dielectric or conductive spine

Neighboring gate-all-around integrated circuit structures having co...

Fin doping and integrated circuit structures resulting therefrom

Wrap-around contact structures for semiconductor nanowires and nano...

Nanowire structures having non-discrete source and drain regions

Vertically stacked finFETs and shared gate patterning

Extension of nanocomb transistor arrangements to implement gate all...

Self-aligned gate endcap (SAGE) architectures with gate-all-around...

Channel structures with sub-fin dopant diffusion blocking layers

Forksheet transistors with dielectric or conductive spine

Sub-fin leakage reduction for template strained materials

Transistor contact area enhancement

Wrap-around contact structures for semiconductor nanowires and nano...

Nanowire structures having wrap-around contacts

Isolation schemes for gate-all-around transistor devices

Deep source and drain for transistor structures with back-side cont...

Strained tunable nanowire structures and process

Metallization structures under a semiconductor device layer

Sub-fin leakage reduction for template strained materials

Method of fabricating CMOS FinFETs by selectively etching a straine...

Device, method and system to provide a stressed channel of a transi...

Nanowire structures having non-discrete source and drain regions

Gate-all-around integrated circuit structures having high mobility

Wrap-around contact structures for semiconductor nanowires and nano...

Removal of a bottom-most nanowire from a nanowire device stack

Gate-all-around integrated circuit structures having vertically dis...

Vertical integration scheme and circuit elements architecture for a...

Channel structures with sub-fin dopant diffusion blocking layers

Increased transistor source/drain contact area using sacrificial so...

Multiple strain states in epitaxial transistor channel through the...

Patents Applicationslast 30 patents

NEIGHBORING GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING CO...

SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH GATE-ALL-AROUND...

EXTENSION OF NANOCOMB TRANSISTOR ARRANGEMENTS TO IMPLEMENT GATE ALL...

INTEGRATED CIRCUIT STRUCTURES WITH CAVITY SPACERS

FORKSHEET TRANSISTORS WITH DIELECTRIC OR CONDUCTIVE SPINE

INTEGRATED CIRCUIT STRUCTURES HAVING UNIFORM GRID METAL GATE AND TR...

WRAP-AROUND CONTACT STRUCTURES FOR SEMICONDUCTOR NANOWIRES AND NANO...

GATE SPACERS WITH ADJACENT UNIFORM EPITAXIAL MATERIAL

GATE CUT GRID ACROSS INTEGRATED CIRCUIT

INTEGRATED CIRCUITS WITH GATE PLUGS TO INDUCE COMPRESSIVE CHANNEL S...

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING SOURCE OR DRAI...

SUB-FIN LEAKAGE REDUCTION FOR TEMPLATE STRAINED MATERIALS

CMOS FINFET DEVICE HAVING STRAINED SIGE FINS AND A STRAINED SI CLAD...

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING HIGH MOBILITY

DEVICE, METHOD AND SYSTEM TO PROVIDE A STRESSED CHANNEL OF A TRANSI...

SINGLE-SIDED NANOSHEET TRANSISTORS

Nanowire Structures Having Non-Discrete Source and Drain Regions

INTEGRATED CIRCUIT STRUCTURES HAVING METAL-CONTAINING SOURCE OR DRA...

SILICON RICH CAPPING LAYER PRE-AMORPHIZED WITH GERMANIUM AND BORON...

TRANSISTOR STRUCTURES WITH REDUCED SOURCE/DRAIN LEAKAGE THROUGH BAC...

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DOPED SUBFIN

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING VERTICALLY DIS...

WRAP-AROUND CONTACT STRUCTURES FOR SEMICONDUCTOR NANOWIRES AND NANO...

VERTICAL INTEGRATION SCHEME AND CIRCUIT ELEMENTS ARCHITECTURE FOR A...

CHANNEL STRUCTURES WITH SUB-FIN DOPANT DIFFUSION BLOCKING LAYERS

TRANSISTORS WITH SOURCE & DRAIN ETCH STOP

VERTICALLY STACKED FINFETS & SHARED GATE PATTERNING

FIN DOPING AND INTEGRATED CIRCUIT STRUCTURES RESULTING THEREFROM

ISOLATION SCHEMES FOR GATE-ALL-AROUND TRANSISTOR DEVICES

NEIGHBORING GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING CO...