Stephen T. Quay

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit buffering solutions considering sink delays
- Patent number 10,372,836
- Issue date Aug 6, 2019
- International Business Machines Corporation
- Ying Zhou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit buffering solutions considering sink delays
- Patent number 10,372,837
- Issue date Aug 6, 2019
- International Business Machines Corporation
- Ying Zhou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit buffering solutions considering sink delays
- Patent number 10,346,558
- Issue date Jul 9, 2019
- International Business Machines Corporation
- Ying Zhou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Addressing coupled noise-based violations with buffering in a batch...
- Patent number 9,875,326
- Issue date Jan 23, 2018
- International Business Machines Corporation
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic generation of wire tag lists for a metal stack
- Patent number 9,092,591
- Issue date Jul 28, 2015
- International Business Machines Corporation
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Early design cycle optimization
- Patent number 9,038,009
- Issue date May 19, 2015
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical synthesis optimization with fast metric check
- Patent number 8,881,089
- Issue date Nov 4, 2014
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic generation of wire tag lists for a metal stack
- Patent number 8,769,468
- Issue date Jul 1, 2014
- International Business Machines Corporation
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Early design cycle optimzation
- Patent number 8,640,075
- Issue date Jan 28, 2014
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing driven routing in integrated circuit design
- Patent number 8,386,985
- Issue date Feb 26, 2013
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resolving global coupling timing and slew violations for buffer-dom...
- Patent number 8,365,120
- Issue date Jan 29, 2013
- International Business Machines Corporation
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Concurrent buffering and layer assignment in integrated circuit layout
- Patent number 7,895,557
- Issue date Feb 22, 2011
- International Business Machines Corporation
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Slew constrained minimum cost buffering
- Patent number 7,890,905
- Issue date Feb 15, 2011
- International Business Machines Corporation
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for super fast buffer insertion
- Patent number 7,676,780
- Issue date Mar 9, 2010
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer insertion to reduce wirelength in VLSI circuits
- Patent number 7,484,199
- Issue date Jan 27, 2009
- International Business Machines Corporation
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Slew constrained minimum cost buffering
- Patent number 7,448,007
- Issue date Nov 4, 2008
- International Business Machines Corporation
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for super fast buffer insertion
- Patent number 7,392,493
- Issue date Jun 24, 2008
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Probabilistic congestion prediction with partial blockages
- Patent number 7,299,442
- Issue date Nov 20, 2007
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing density-biased buffer insertion...
- Patent number 7,137,081
- Issue date Nov 14, 2006
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for generating steiner trees using simultaneou...
- Patent number 7,127,696
- Issue date Oct 24, 2006
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Porosity aware buffered steiner tree construction
- Patent number 7,065,730
- Issue date Jun 20, 2006
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of and system for buffer insertion, layer assignment, and wi...
- Patent number 7,036,104
- Issue date Apr 25, 2006
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for incorporating driver sizing into buffer in...
- Patent number 6,915,496
- Issue date Jul 5, 2005
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer insertion with adaptive blockage avoidance
- Patent number 6,898,774
- Issue date May 24, 2005
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for determining buffered steiner trees for com...
- Patent number 6,591,411
- Issue date Jul 8, 2003
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for buffer library selection for use in buffer...
- Patent number 6,560,752
- Issue date May 6, 2003
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for re-routing interconnects within an integrated...
- Patent number 6,401,234
- Issue date Jun 4, 2002
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for performing circuit analysis on an integrated-...
- Patent number 6,360,350
- Issue date Mar 19, 2002
- International Business Corporation
- Carol Ivash Gabele
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing buffer insertion with accurate...
- Patent number 6,347,393
- Issue date Feb 12, 2002
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for performing timing analysis on an integrated c...
- Patent number 6,230,302
- Issue date May 8, 2001
- International Business Machines Corporation
- Carol Ivash Gabele
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT BUFFERING SOLUTIONS CONSIDERING SINK DELAYS
- Publication number 20180373815
- Publication date Dec 27, 2018
- International Business Machines Corporation
- Ying Zhou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT BUFFERING SOLUTIONS CONSIDERING SINK DELAYS
- Publication number 20180373813
- Publication date Dec 27, 2018
- International Business Machines Corporation
- Ying Zhou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT BUFFERING SOLUTIONS CONSIDERING SINK DELAYS
- Publication number 20180373814
- Publication date Dec 27, 2018
- International Business Machines Corporation
- Ying Zhou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Addressing Coupled Noise-Based Violations with Buffering in a Batch...
- Publication number 20170161407
- Publication date Jun 8, 2017
- International Business Machines Corporation
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automatic Generation of Wire Tag Lists for a Metal Stack
- Publication number 20140223397
- Publication date Aug 7, 2014
- International Business Machines Corporation
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automatic Generation of Wire Tag Lists for a Metal Stack
- Publication number 20140195998
- Publication date Jul 10, 2014
- International Business Machines Corporation
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EARLY DESIGN CYCLE OPTIMZATION
- Publication number 20140101629
- Publication date Apr 10, 2014
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EARLY DESIGN CYCLE OPTIMZATION
- Publication number 20130326450
- Publication date Dec 5, 2013
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIMING DRIVEN ROUTING IN INTEGRATED CIRCUIT DESIGN
- Publication number 20120284683
- Publication date Nov 8, 2012
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Resolving Global Coupling Timing and Slew Violations for Buffer-Dom...
- Publication number 20120144358
- Publication date Jun 7, 2012
- International Business Machines Corporation
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Concurrent Buffering and Layer Assignment in...
- Publication number 20090259980
- Publication date Oct 15, 2009
- Charles J. ALPERT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUFFER INSERTION TO REDUCE WIRELENGTH IN VLSI CIRCUITS
- Publication number 20090064080
- Publication date Mar 5, 2009
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUFFER INSERTION TO REDUCE WIRELENGTH IN VLSI CIRCUITS
- Publication number 20090013299
- Publication date Jan 8, 2009
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SLEW CONSTRAINED MINIMUM COST BUFFERING
- Publication number 20080295051
- Publication date Nov 27, 2008
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR SUPER FAST BUFFER INSERTION
- Publication number 20080072202
- Publication date Mar 20, 2008
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Slew Constrained Minimum Cost Buffering
- Publication number 20080016479
- Publication date Jan 17, 2008
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method of Eliminating Electrical Violations
- Publication number 20070283301
- Publication date Dec 6, 2007
- Arvind K. Karandikar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Buffer Insertion to Reduce Wirelength in VLSI Circuits
- Publication number 20070271543
- Publication date Nov 22, 2007
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Probabilistic congestion prediction with partial blockages
- Publication number 20060156266
- Publication date Jul 13, 2006
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniqes for super fast buffer insertion
- Publication number 20060112364
- Publication date May 25, 2006
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for performing density-biased buffer insertion...
- Publication number 20050138589
- Publication date Jun 23, 2005
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for generating steiner trees using simultaneou...
- Publication number 20050138578
- Publication date Jun 23, 2005
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Porosity aware buffered steiner tree construction
- Publication number 20040216072
- Publication date Oct 28, 2004
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Buffer insertion with adaptive blockage avoidance
- Publication number 20040123261
- Publication date Jun 24, 2004
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for incorporating driver sizing into buffer in...
- Publication number 20040064793
- Publication date Apr 1, 2004
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for determining buffered steiner trees for com...
- Publication number 20020133799
- Publication date Sep 19, 2002
- International Business Machines Corporation
- Charles Jay Alpert
- G06 - COMPUTING CALCULATING COUNTING

Stephen T. Quay

Person

Patents Grantslast 30 patents

Integrated circuit buffering solutions considering sink delays

Integrated circuit buffering solutions considering sink delays

Integrated circuit buffering solutions considering sink delays

Addressing coupled noise-based violations with buffering in a batch...

Automatic generation of wire tag lists for a metal stack

Early design cycle optimization

Physical synthesis optimization with fast metric check

Automatic generation of wire tag lists for a metal stack

Early design cycle optimzation

Timing driven routing in integrated circuit design

Resolving global coupling timing and slew violations for buffer-dom...

Concurrent buffering and layer assignment in integrated circuit layout

Slew constrained minimum cost buffering

Techniques for super fast buffer insertion

Buffer insertion to reduce wirelength in VLSI circuits

Slew constrained minimum cost buffering

Techniques for super fast buffer insertion

Probabilistic congestion prediction with partial blockages

Method and apparatus for performing density-biased buffer insertion...

Method and apparatus for generating steiner trees using simultaneou...

Porosity aware buffered steiner tree construction

Method of and system for buffer insertion, layer assignment, and wi...

Apparatus and method for incorporating driver sizing into buffer in...

Buffer insertion with adaptive blockage avoidance

Apparatus and method for determining buffered steiner trees for com...

Apparatus and method for buffer library selection for use in buffer...

Method and system for re-routing interconnects within an integrated...

Method and system for performing circuit analysis on an integrated-...

Method and apparatus for performing buffer insertion with accurate...

Method and system for performing timing analysis on an integrated c...

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT BUFFERING SOLUTIONS CONSIDERING SINK DELAYS

INTEGRATED CIRCUIT BUFFERING SOLUTIONS CONSIDERING SINK DELAYS

INTEGRATED CIRCUIT BUFFERING SOLUTIONS CONSIDERING SINK DELAYS

Addressing Coupled Noise-Based Violations with Buffering in a Batch...

Automatic Generation of Wire Tag Lists for a Metal Stack

Automatic Generation of Wire Tag Lists for a Metal Stack

EARLY DESIGN CYCLE OPTIMZATION

EARLY DESIGN CYCLE OPTIMZATION

TIMING DRIVEN ROUTING IN INTEGRATED CIRCUIT DESIGN

Resolving Global Coupling Timing and Slew Violations for Buffer-Dom...

Method and System for Concurrent Buffering and Layer Assignment in...

BUFFER INSERTION TO REDUCE WIRELENGTH IN VLSI CIRCUITS

BUFFER INSERTION TO REDUCE WIRELENGTH IN VLSI CIRCUITS

SLEW CONSTRAINED MINIMUM COST BUFFERING

TECHNIQUES FOR SUPER FAST BUFFER INSERTION

Slew Constrained Minimum Cost Buffering

System and Method of Eliminating Electrical Violations

Buffer Insertion to Reduce Wirelength in VLSI Circuits

Probabilistic congestion prediction with partial blockages

Techniqes for super fast buffer insertion

Method and apparatus for performing density-biased buffer insertion...

Method and apparatus for generating steiner trees using simultaneou...

Porosity aware buffered steiner tree construction

Buffer insertion with adaptive blockage avoidance

Apparatus and method for incorporating driver sizing into buffer in...

Apparatus and method for determining buffered steiner trees for com...