Steve Undy

Person

Fort Collins, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatuses for reducing step loads of processors
- Patent number 8,886,979
- Issue date Nov 11, 2014
- Intel Corporation
- Kevin Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatuses for reducing step loads of processors
- Patent number 8,479,029
- Issue date Jul 2, 2013
- Intel Corporation
- Kevin Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatuses for reducing step loads of processors
- Patent number 7,992,017
- Issue date Aug 2, 2011
- Intel Corporation
- Kevin Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for fetching instructions from the memory subs...
- Patent number 7,356,674
- Issue date Apr 8, 2008
- Hewlett-Packard Development Company, L.P.
- Anuj Dua
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing two architectures in a chip
- Patent number 7,343,479
- Issue date Mar 11, 2008
- Hewlett-Packard Development Company, L.P.
- Patrick Knebel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register renaming to reduce bypass and increase apparent physical r...
- Patent number 6,944,751
- Issue date Sep 13, 2005
- Hewlett-Packard Development Company, L.P.
- Eric S. Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic manufacturing test case generation method and system
- Patent number 6,883,150
- Issue date Apr 19, 2005
- Hewlett-Packard Development Company, L.P.
- Donald C. Soltis, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefetch instruction for an unpredicted path including a flush fiel...
- Patent number 6,799,263
- Issue date Sep 28, 2004
- Hewlett-Packard Development Company, L.P.
- Dale C. Morris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing a single-syllable IP-relative...
- Patent number 6,721,875
- Issue date Apr 13, 2004
- Hewlett-Packard Development Company, L.P.
- James E McCormick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-speculative instruction fetch in speculative processing
- Patent number 6,711,671
- Issue date Mar 23, 2004
- Hewlett-Packard Development Company, L.P.
- Stephen R. Undy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for fetching instructions from the memory subs...
- Patent number 6,678,817
- Issue date Jan 13, 2004
- Hewlett-Packard Development Company, L.P.
- Anuj Dua
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for shift register rate control of microproces...
- Patent number 6,647,487
- Issue date Nov 11, 2003
- Hewlett-Packard Development Company, L.P.
- Stephen R. Undy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipeline decoupling buffer for handling early data and late data
- Patent number 6,629,167
- Issue date Sep 30, 2003
- Hewlett-Packard Development Company, L.P.
- Stephen Undy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing two architectures in a chip u...
- Patent number 6,618,801
- Issue date Sep 9, 2003
- Hewlett-Packard Development Company, L.P.
- Patrick Knebel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing cache pollution
- Patent number 6,516,388
- Issue date Feb 4, 2003
- Hewlett-Packard Company
- James E. McCormick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for broadside reads of CAM structures
- Patent number 6,493,792
- Issue date Dec 10, 2002
- Hewlett-Packard Company
- Stephen R. Undy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Opportunistic use of pre-corrected data to improve processor perfor...
- Patent number 5,961,655
- Issue date Oct 5, 1999
- Hewlett-Packard Company
- Leith Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-level instruction cache for a computer
- Patent number 5,860,096
- Issue date Jan 12, 1999
- Hewlett-Packard Company
- Stephen R. Undy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Associative cache memory with improved hit time
- Patent number 5,860,097
- Issue date Jan 12, 1999
- Hewlett-Packard Company
- David J. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simultaneous execution of two memory reference instructions with on...
- Patent number 5,829,049
- Issue date Oct 27, 1998
- Hewlett-Packard Company
- William L. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated debug trigger method and apparatus for an integrated cir...
- Patent number 5,751,735
- Issue date May 12, 1998
- Hewlett-Packard Company
- Paul G. Tobin
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Methods And Apparatuses For Reducing Step Loads Of Processors
- Publication number 20130275787
- Publication date Oct 17, 2013
- Kevin Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods And Apparatuses For Reducing Step Loads Of Processors
- Publication number 20110252255
- Publication date Oct 13, 2011
- Kevin Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and apparatuses for reducing step loads of processors
- Publication number 20090070607
- Publication date Mar 12, 2009
- Kevin Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Microprocessor architected state signature analysis
- Publication number 20060112257
- Publication date May 25, 2006
- Stephen R. Undy
- G01 - MEASURING TESTING
Information Patent Application
Error detection method and system for processors that employ altern...
- Publication number 20050138478
- Publication date Jun 23, 2005
- Kevin D. Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error detection method and system for processors that employs locks...
- Publication number 20050108509
- Publication date May 19, 2005
- Kevin D. Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automatic manufacturing test case generation method and system
- Publication number 20040181763
- Publication date Sep 16, 2004
- Donald C. Soltis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for fetching instructions from the memory subs...
- Publication number 20040107335
- Publication date Jun 3, 2004
- Anuj Dua
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Routing of wires carrying single-syllable IP-relative branch instru...
- Publication number 20040095965
- Publication date May 20, 2004
- James E. McCormick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of patching compiled and linked program code comprising inst...
- Publication number 20040049667
- Publication date Mar 11, 2004
- James E. McCormick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for implementing two architectures in a chip
- Publication number 20040030865
- Publication date Feb 12, 2004
- Patrick Knebel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Register renaming to reduce bypass and increase apparent physical r...
- Publication number 20030163672
- Publication date Aug 28, 2003
- Eric S. Fetzer
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Methods and apparatuses for reducing step loads of processors

Methods and apparatuses for reducing step loads of processors

Methods and apparatuses for reducing step loads of processors

Method and apparatus for fetching instructions from the memory subs...

Method and apparatus for implementing two architectures in a chip

Register renaming to reduce bypass and increase apparent physical r...

Automatic manufacturing test case generation method and system

Prefetch instruction for an unpredicted path including a flush fiel...

Method and apparatus for implementing a single-syllable IP-relative...

Non-speculative instruction fetch in speculative processing

Method and apparatus for fetching instructions from the memory subs...

Apparatus and method for shift register rate control of microproces...

Pipeline decoupling buffer for handling early data and late data

Method and apparatus for implementing two architectures in a chip u...

Method and apparatus for reducing cache pollution

Mechanism for broadside reads of CAM structures

Opportunistic use of pre-corrected data to improve processor perfor...

Multi-level instruction cache for a computer

Associative cache memory with improved hit time

Simultaneous execution of two memory reference instructions with on...

Integrated debug trigger method and apparatus for an integrated cir...

Patents Applicationslast 30 patents

Methods And Apparatuses For Reducing Step Loads Of Processors

Methods And Apparatuses For Reducing Step Loads Of Processors

Methods and apparatuses for reducing step loads of processors

Microprocessor architected state signature analysis

Error detection method and system for processors that employ altern...

Error detection method and system for processors that employs locks...

Automatic manufacturing test case generation method and system

Method and apparatus for fetching instructions from the memory subs...

Routing of wires carrying single-syllable IP-relative branch instru...

Method of patching compiled and linked program code comprising inst...

Method and apparatus for implementing two architectures in a chip

Register renaming to reduce bypass and increase apparent physical r...