Steven C. McMahan

Person

Richardson, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Testing self-repairing memory of a device
- Patent number 7,490,276
- Issue date Feb 10, 2009
- Cisco Technology, Inc.
- Christopher E. White
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing self-repairing memory of a device
- Patent number 7,007,211
- Issue date Feb 28, 2006
- Cisco Technology, Inc.
- Christopher E. White
- G11 - INFORMATION STORAGE
Information Patent Grant
Processor with multiple execution pipelines using pipe stage state...
- Patent number 6,138,230
- Issue date Oct 24, 2000
- VIA-Cyrix, Inc.
- Mark W. Hervin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed processor for operation at reduced operating voltage
- Patent number 5,878,269
- Issue date Mar 2, 1999
- National Semiconductor Corporation
- John K. Eitrheim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Branch processing unit with target cache read prioritization protoc...
- Patent number 5,835,951
- Issue date Nov 10, 1998
- National Semiconductor
- Steven C. McMahan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of identifying and self-modifying code
- Patent number 5,835,949
- Issue date Nov 10, 1998
- National Semiconductor Corporation
- Marc A. Quattromani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjusting prefetch size based on source of prefetch address
- Patent number 5,835,967
- Issue date Nov 10, 1998
- Cyrix Corporation
- Steven C. McMahan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address calculation logic including limit checking using carry out...
- Patent number 5,784,713
- Issue date Jul 21, 1998
- Cyrix Corporation
- Steven C. McMahan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Condensed microaddress generation in a complex instruction set comp...
- Patent number 5,771,365
- Issue date Jun 23, 1998
- Cyrix Corporation
- Steven C. McMahan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch processing unit with a far target cache accessed by indirect...
- Patent number 5,740,416
- Issue date Apr 14, 1998
- Cyrix Corporation
- Steven C. McMahan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch processing unit with target cache using low/high banking to...
- Patent number 5,732,243
- Issue date Mar 24, 1998
- Cyrix Corporation
- Steven C. McMahan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch processing unit with target cache storing history for predic...
- Patent number 5,732,253
- Issue date Mar 24, 1998
- Cyrix Corporation
- Steven C. McMahan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch processing unit with a return stack including repair using p...
- Patent number 5,706,491
- Issue date Jan 6, 1998
- Cyrix Corporation
- Steven C. McMahan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefetch buffer using flow control bit to identify changes of flow...
- Patent number 5,692,168
- Issue date Nov 25, 1997
- Cyrix Corporation
- Steven C. McMahan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with single clock decode architecture employing single mi...
- Patent number 5,644,741
- Issue date Jul 1, 1997
- Cyrix Corporation
- Mark W. Bluhm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Carry skip adder with independent carry-in and carry skip paths
- Patent number 5,337,269
- Issue date Aug 9, 1994
- Cyrix Corporation
- Steven C. McMahan
- G06 - COMPUTING CALCULATING COUNTING

Steven C. McMahan

Person

Patents Grantslast 30 patents

Testing self-repairing memory of a device

Testing self-repairing memory of a device

Processor with multiple execution pipelines using pipe stage state...

High speed processor for operation at reduced operating voltage

Branch processing unit with target cache read prioritization protoc...

Method of identifying and self-modifying code

Adjusting prefetch size based on source of prefetch address

Address calculation logic including limit checking using carry out...

Condensed microaddress generation in a complex instruction set comp...

Branch processing unit with a far target cache accessed by indirect...

Branch processing unit with target cache using low/high banking to...

Branch processing unit with target cache storing history for predic...

Branch processing unit with a return stack including repair using p...

Prefetch buffer using flow control bit to identify changes of flow...

Processor with single clock decode architecture employing single mi...

Carry skip adder with independent carry-in and carry skip paths