Steven J. Pollock

Person

Allentown, PA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Modifying data streams without reordering in a multi-thread, multi-...
- Patent number 9,461,930
- Issue date Oct 4, 2016
- Intel Corporation
- Steven J. Pollock
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Dynamic configuration of processing modules in a network communicat...
- Patent number 9,444,757
- Issue date Sep 13, 2016
- Intel Corporation
- Hakan I. Pekcan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Changing a flow identifier of a packet in a multi-thread, multi-flo...
- Patent number 8,949,582
- Issue date Feb 3, 2015
- LSI Corporation
- Deepak Mital
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory manager for a network communications processor architecture
- Patent number 8,677,075
- Issue date Mar 18, 2014
- LSI Corporation
- Deepak Mital
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reducing data read latency in a network communications processor ar...
- Patent number 8,505,013
- Issue date Aug 6, 2013
- LSI Corporation
- Steven Pollock
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Transaction performance monitoring in a processor bus bridge
- Patent number 8,489,792
- Issue date Jul 16, 2013
- LSI Corporation
- Richard J. Byrne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffered crossbar switch system
- Patent number 8,352,669
- Issue date Jan 8, 2013
- LSI Corporation
- Ephrem Wu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Gas venting component mounting pad
- Patent number 7,709,744
- Issue date May 4, 2010
- Intel Corporation
- Richard C. Schaefer
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Inter-DSP signaling in a multiple DSP environment
- Patent number 7,389,368
- Issue date Jun 17, 2008
- Agere Systems Inc.
- William G. Burroughs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable delay circuit having reduced insertion delay
- Patent number 7,382,170
- Issue date Jun 3, 2008
- Agere Systems Inc.
- Steven J. Pollock
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Ergonomic mouse
- Patent number 6,781,573
- Issue date Aug 24, 2004
- Intel Corporation
- Ted T. Honma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for obtaining geographical information using a...
- Patent number 6,720,956
- Issue date Apr 13, 2004
- Intel Corporation
- Ted T. Honma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient multiple power and ground distribution of SMT IC packages
- Patent number 6,707,145
- Issue date Mar 16, 2004
- Intel Corporation
- Steven L. Pollock
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
SYSTEM TEST AND METHOD FOR CHECKING PROCESSOR OVER-CLOCKING BY RETR...
- Patent number 6,691,242
- Issue date Feb 10, 2004
- Intel Corporation
- Steven L. Pollock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inter-DSP data exchange in a multiple DSP environment
- Patent number 6,691,190
- Issue date Feb 10, 2004
- Agere Systems Inc.
- William G. Burroughs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit package with EMI shield
- Patent number 6,479,886
- Issue date Nov 12, 2002
- Intel Corporation
- Steven L. Pollock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
PLGA-BGA socket using elastomer connectors
- Patent number 6,392,887
- Issue date May 21, 2002
- Intel Corporation
- Jeffrey W. Day
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package with EMI shield
- Patent number 6,365,960
- Issue date Apr 2, 2002
- Intel Corporation
- Steven L. Pollock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Processor card connector
- Patent number 6,056,601
- Issue date May 2, 2000
- Intel Corporation
- Steven L. Pollock
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
LOAD BALANCER
- Publication number 20230401109
- Publication date Dec 14, 2023
- Intel Corporation
- Niall D. MCDONNELL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING CURRENT VARIATION WHEN SWITCHING CLOCKS
- Publication number 20150091620
- Publication date Apr 2, 2015
- LSI Corporation
- Steven J. Pollock
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Changing a Flow Identifier of a Packet in a Multi-Thread, Multi-Flo...
- Publication number 20130089098
- Publication date Apr 11, 2013
- LSI Corporation
- Deepak Mital
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Modifying Data Streams without Reordering in a Multi-Thread, Multi-...
- Publication number 20130089099
- Publication date Apr 11, 2013
- LSI Corporation
- Steven J. Pollock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MANAGER FOR A NETWORK COMMUNICATIONS PROCESSOR ARCHITECTURE
- Publication number 20120131283
- Publication date May 24, 2012
- LSI CORPORATION
- Deepak Mital
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC CONFIGURATION OF PROCESSING MODULES IN A NETWORK COMMUNICAT...
- Publication number 20110289179
- Publication date Nov 24, 2011
- LSI CORPORATION
- Hakan I. Pekcan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING DATA READ LATENCY IN A NETWORK COMMUNICATIONS PROCESSOR AR...
- Publication number 20110225588
- Publication date Sep 15, 2011
- LSI CORPORATION
- Steven Pollock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Gas Venting Component Mounting Pad
- Publication number 20080236871
- Publication date Oct 2, 2008
- Intel Corporation
- Richard C. Schaefer
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Programmable delay circuit having reduced insertion delay
- Publication number 20070241800
- Publication date Oct 18, 2007
- Steven J. Pollock
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Efficient multiple power and ground distribution of SMT IC packages
- Publication number 20020084533
- Publication date Jul 4, 2002
- Steven L. Pollock
- H01 - BASIC ELECTRIC ELEMENTS

Steven J. Pollock

Person

Patents Grantslast 30 patents

Modifying data streams without reordering in a multi-thread, multi-...

Dynamic configuration of processing modules in a network communicat...

Changing a flow identifier of a packet in a multi-thread, multi-flo...

Memory manager for a network communications processor architecture

Reducing data read latency in a network communications processor ar...

Transaction performance monitoring in a processor bus bridge

Buffered crossbar switch system

Gas venting component mounting pad

Inter-DSP signaling in a multiple DSP environment

Programmable delay circuit having reduced insertion delay

Ergonomic mouse

Apparatus and method for obtaining geographical information using a...

Efficient multiple power and ground distribution of SMT IC packages

SYSTEM TEST AND METHOD FOR CHECKING PROCESSOR OVER-CLOCKING BY RETR...

Inter-DSP data exchange in a multiple DSP environment

Integrated circuit package with EMI shield

PLGA-BGA socket using elastomer connectors

Integrated circuit package with EMI shield

Processor card connector

Patents Applicationslast 30 patents

LOAD BALANCER

REDUCING CURRENT VARIATION WHEN SWITCHING CLOCKS

Changing a Flow Identifier of a Packet in a Multi-Thread, Multi-Flo...

Modifying Data Streams without Reordering in a Multi-Thread, Multi-...

MEMORY MANAGER FOR A NETWORK COMMUNICATIONS PROCESSOR ARCHITECTURE

DYNAMIC CONFIGURATION OF PROCESSING MODULES IN A NETWORK COMMUNICAT...

REDUCING DATA READ LATENCY IN A NETWORK COMMUNICATIONS PROCESSOR AR...

Gas Venting Component Mounting Pad

Programmable delay circuit having reduced insertion delay

Efficient multiple power and ground distribution of SMT IC packages