Steven J. Wallach

Person

Dallas, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Reduce data traffic between cache and memory via data access of var...
- Patent number 12,169,454
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic configuration of a computer processor based on the presence...
- Patent number 12,131,178
- Issue date Oct 29, 2024
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache with set associativity having data defined cache sets
- Patent number 12,019,555
- Issue date Jun 25, 2024
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache systems for main and speculative threads of processors
- Patent number 11,954,493
- Issue date Apr 9, 2024
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Registers in vector processors to store addresses for accessing vec...
- Patent number 11,941,402
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data protection in computer processors
- Patent number 11,914,756
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Access control for processor registers based on execution domains
- Patent number 11,914,726
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector processor with vector first and multiple lane configuration
- Patent number 11,907,158
- Issue date Feb 20, 2024
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Key management in computer processors
- Patent number 11,868,274
- Issue date Jan 9, 2024
- Lodestar Licensing Group LLC
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data defined caches for speculative and normal executions
- Patent number 11,860,786
- Issue date Jan 2, 2024
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extended tags for speculative and normal executions
- Patent number 11,775,308
- Issue date Oct 3, 2023
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache systems and circuits for syncing caches or cache sets
- Patent number 11,734,015
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Securing conditional speculative instruction execution
- Patent number 11,720,367
- Issue date Aug 8, 2023
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-lane solutions for addressing vector elements using vector in...
- Patent number 11,681,594
- Issue date Jun 20, 2023
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Domain register for instructions being executed in computer processors
- Patent number 11,620,239
- Issue date Apr 4, 2023
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Security configurations in page table entries for execution domains
- Patent number 11,561,904
- Issue date Jan 24, 2023
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Allocation of spare cache reserved during non-speculative execution...
- Patent number 11,561,903
- Issue date Jan 24, 2023
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Universal pointers for data exchange in a computer system having in...
- Patent number 11,544,069
- Issue date Jan 3, 2023
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
True/false vector index registers and methods of populating thereof
- Patent number 11,507,374
- Issue date Nov 22, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic configuration of a computer processor based on the presence...
- Patent number 11,500,665
- Issue date Nov 15, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual machine register in a computer processor
- Patent number 11,481,241
- Issue date Oct 25, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Separate branch target buffers for different levels of calls
- Patent number 11,481,221
- Issue date Oct 25, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory access control through permissions specified in page table e...
- Patent number 11,436,156
- Issue date Sep 6, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shadow cache for securing conditional speculative instruction execu...
- Patent number 11,422,820
- Issue date Aug 23, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Conditional operations in a vector processor having true and false...
- Patent number 11,403,256
- Issue date Aug 2, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Protection against timing-based security attacks by randomly adjust...
- Patent number 11,403,107
- Issue date Aug 2, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache with set associativity having data defined cache sets
- Patent number 11,403,226
- Issue date Aug 2, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extended tags for speculative and normal executions
- Patent number 11,372,648
- Issue date Jun 28, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache systems and circuits for syncing caches or cache sets
- Patent number 11,360,777
- Issue date Jun 14, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector index registers
- Patent number 11,340,904
- Issue date May 24, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CACHE WITH SET ASSOCIATIVITY HAVING DATA DEFINED CACHE SETS
- Publication number 20240345958
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE SYSTEMS FOR MAIN AND SPECULATIVE THREADS OF PROCESSORS
- Publication number 20240264840
- Publication date Aug 8, 2024
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR INDEX REGISTERS
- Publication number 20240231831
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Key Management in Computer Processors
- Publication number 20240095189
- Publication date Mar 21, 2024
- Lodestar Licensing Group LLC
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIVERSAL POINTERS FOR DATA EXCHANGE IN A COMPUTER SYSTEM HAVING IN...
- Publication number 20230146488
- Publication date May 11, 2023
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Security Configurations in Page Table Entries for Execution Domains
- Publication number 20230106598
- Publication date Apr 6, 2023
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALLOCATION OF SPARE CACHE RESERVED DURING NON-SPECULATIVE EXECUTION...
- Publication number 20230103438
- Publication date Apr 6, 2023
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRUE/FALSE VECTOR INDEX REGISTERS AND METHODS OF POPULATING THEREOF
- Publication number 20230077404
- Publication date Mar 16, 2023
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC CONFIGURATION OF A COMPUTER PROCESSOR BASED ON THE PRESENCE...
- Publication number 20230074273
- Publication date Mar 9, 2023
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEPARATE BRANCH TARGET BUFFERS FOR DIFFERENT LEVELS OF CALLS
- Publication number 20230016904
- Publication date Jan 19, 2023
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Virtual Machine Register in a Computer Processor
- Publication number 20230004420
- Publication date Jan 5, 2023
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Access Control through Permissions Specified in Page Table E...
- Publication number 20220414019
- Publication date Dec 29, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHADOW CACHE FOR SECURING CONDITIONAL SPECULATIVE INSTRUCTION EXECU...
- Publication number 20220391212
- Publication date Dec 8, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Protection Against Timing-based Security Attacks on Re-order Buffers
- Publication number 20220350609
- Publication date Nov 3, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONDITIONAL OPERATIONS IN A VECTOR PROCESSOR HAVING TRUE AND FALSE...
- Publication number 20220318186
- Publication date Oct 6, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE SYSTEMS AND CIRCUITS FOR SYNCING CACHES OR CACHE SETS
- Publication number 20220308886
- Publication date Sep 29, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE WITH SET ASSOCIATIVITY HAVING DATA DEFINED CACHE SETS
- Publication number 20220300425
- Publication date Sep 22, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENDED TAGS FOR SPECULATIVE AND NORMAL EXECUTIONS
- Publication number 20220276870
- Publication date Sep 1, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LANE SOLUTIONS FOR ADDRESSING VECTOR ELEMENTS USING VECTOR IN...
- Publication number 20220261325
- Publication date Aug 18, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR INDEX REGISTERS
- Publication number 20220261253
- Publication date Aug 18, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Securing Conditional Speculative Instruction Execution
- Publication number 20220222078
- Publication date Jul 14, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Static Identifications in Object-based Memory Access
- Publication number 20220197648
- Publication date Jun 23, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reduce Data Traffic between Cache and Memory via Data Access of Var...
- Publication number 20220121576
- Publication date Apr 21, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA DEFINED CACHES FOR SPECULATIVE AND NORMAL EXECUTIONS
- Publication number 20220100657
- Publication date Mar 31, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE SYSTEMS FOR MAIN AND SPECULATIVE THREADS OF PROCESSORS
- Publication number 20220083341
- Publication date Mar 17, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Domain Crossing in Executing Instructions in Computer Processors
- Publication number 20220050908
- Publication date Feb 17, 2022
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processors with Security Levels Adjustable per Applications
- Publication number 20210374289
- Publication date Dec 2, 2021
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICROPROCESSOR ARCHITECTURE HAVING ALTERNATIVE MEMORY ACCESS PATHS
- Publication number 20210365381
- Publication date Nov 25, 2021
- Micron Technology, Inc.
- Steven J. Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data Protection in Computer Processors
- Publication number 20210350030
- Publication date Nov 11, 2021
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURING CONDITIONAL SPECULATIVE INSTRUCTION EXECUTION
- Publication number 20210349724
- Publication date Nov 11, 2021
- Micron Technology, Inc.
- Steven Jeffrey Wallach
- G06 - COMPUTING CALCULATING COUNTING

Steven J. Wallach

Person

Patents Grantslast 30 patents

Reduce data traffic between cache and memory via data access of var...

Dynamic configuration of a computer processor based on the presence...

Cache with set associativity having data defined cache sets

Cache systems for main and speculative threads of processors

Registers in vector processors to store addresses for accessing vec...

Data protection in computer processors

Access control for processor registers based on execution domains

Vector processor with vector first and multiple lane configuration

Key management in computer processors

Data defined caches for speculative and normal executions

Extended tags for speculative and normal executions

Cache systems and circuits for syncing caches or cache sets

Securing conditional speculative instruction execution

Multi-lane solutions for addressing vector elements using vector in...

Domain register for instructions being executed in computer processors

Security configurations in page table entries for execution domains

Allocation of spare cache reserved during non-speculative execution...

Universal pointers for data exchange in a computer system having in...

True/false vector index registers and methods of populating thereof

Dynamic configuration of a computer processor based on the presence...

Virtual machine register in a computer processor

Separate branch target buffers for different levels of calls

Memory access control through permissions specified in page table e...

Shadow cache for securing conditional speculative instruction execu...

Conditional operations in a vector processor having true and false...

Protection against timing-based security attacks by randomly adjust...

Cache with set associativity having data defined cache sets

Extended tags for speculative and normal executions

Cache systems and circuits for syncing caches or cache sets

Vector index registers

Patents Applicationslast 30 patents

CACHE WITH SET ASSOCIATIVITY HAVING DATA DEFINED CACHE SETS

CACHE SYSTEMS FOR MAIN AND SPECULATIVE THREADS OF PROCESSORS

VECTOR INDEX REGISTERS

Key Management in Computer Processors

UNIVERSAL POINTERS FOR DATA EXCHANGE IN A COMPUTER SYSTEM HAVING IN...

Security Configurations in Page Table Entries for Execution Domains

ALLOCATION OF SPARE CACHE RESERVED DURING NON-SPECULATIVE EXECUTION...

TRUE/FALSE VECTOR INDEX REGISTERS AND METHODS OF POPULATING THEREOF

DYNAMIC CONFIGURATION OF A COMPUTER PROCESSOR BASED ON THE PRESENCE...

SEPARATE BRANCH TARGET BUFFERS FOR DIFFERENT LEVELS OF CALLS

Virtual Machine Register in a Computer Processor

Memory Access Control through Permissions Specified in Page Table E...

SHADOW CACHE FOR SECURING CONDITIONAL SPECULATIVE INSTRUCTION EXECU...

Protection Against Timing-based Security Attacks on Re-order Buffers

CONDITIONAL OPERATIONS IN A VECTOR PROCESSOR HAVING TRUE AND FALSE...

CACHE SYSTEMS AND CIRCUITS FOR SYNCING CACHES OR CACHE SETS

CACHE WITH SET ASSOCIATIVITY HAVING DATA DEFINED CACHE SETS

EXTENDED TAGS FOR SPECULATIVE AND NORMAL EXECUTIONS

MULTI-LANE SOLUTIONS FOR ADDRESSING VECTOR ELEMENTS USING VECTOR IN...

VECTOR INDEX REGISTERS

Securing Conditional Speculative Instruction Execution

Static Identifications in Object-based Memory Access

Reduce Data Traffic between Cache and Memory via Data Access of Var...

DATA DEFINED CACHES FOR SPECULATIVE AND NORMAL EXECUTIONS

CACHE SYSTEMS FOR MAIN AND SPECULATIVE THREADS OF PROCESSORS

Domain Crossing in Executing Instructions in Computer Processors

Processors with Security Levels Adjustable per Applications

MICROPROCESSOR ARCHITECTURE HAVING ALTERNATIVE MEMORY ACCESS PATHS

Data Protection in Computer Processors

SECURING CONDITIONAL SPECULATIVE INSTRUCTION EXECUTION