Steven K. Knapp

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Reconfigurable processor circuit architecture
- Patent number 11,977,509
- Issue date May 7, 2024
- Cornami, Inc.
- Paul L. Master
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable processor circuit architecture
- Patent number 11,907,157
- Issue date Feb 20, 2024
- Cornami, Inc.
- Paul L. Master
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable processor circuit architecture
- Patent number 11,494,331
- Issue date Nov 8, 2022
- Cornami, Inc.
- Paul L. Master
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of authenticating a programmable integrated circuit in comb...
- Patent number 8,863,230
- Issue date Oct 14, 2014
- Xilinx, Inc.
- Steven K. Knapp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of authenticating a user design in a programmable integrate...
- Patent number 7,987,358
- Issue date Jul 26, 2011
- Xilinx, Inc.
- James A. Walstrum, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Authentication for information provided to an integrated circuit
- Patent number 7,768,293
- Issue date Aug 3, 2010
- Xilinx, Inc.
- Steven K. Knapp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Authentication for information provided to an integrated circuit
- Patent number 7,535,249
- Issue date May 19, 2009
- Xilinx, Inc.
- Steven K. Knapp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to program non-JTAG attached devices or memories using a PLD...
- Patent number 7,454,556
- Issue date Nov 18, 2008
- Xilinx, Inc.
- Steven K. Knapp
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Parallel interface for configuring programmable devices
- Patent number 7,358,762
- Issue date Apr 15, 2008
- Xilinx, Inc.
- James A. Walstrum, Jr.
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flexible scheme for configuring programmable semiconductor devices...
- Patent number 7,281,082
- Issue date Oct 9, 2007
- Xilinx, Inc.
- Steven K. Knapp
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus to copy protect software programs
- Patent number 7,243,227
- Issue date Jul 10, 2007
- Xilinx, Inc.
- Steven K. Knapp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of optimizing resource allocation starting from a high level...
- Patent number 5,737,234
- Issue date Apr 7, 1998
- Jorge P. Seidel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
State splitting for level reduction
- Patent number 5,617,573
- Issue date Apr 1, 1997
- Xilinx, Inc.
- Alan Y. Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of allocating logic using general function components
- Patent number 5,574,655
- Issue date Nov 12, 1996
- Xilinx, Inc.
- Steven K. Knapp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for optimizing resource allocation starting from a high level
- Patent number 5,553,001
- Issue date Sep 3, 1996
- Xilinx, Inc.
- Jorge P. Seidel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for generating logic modules from a high level block diagram
- Patent number 5,499,192
- Issue date Mar 12, 1996
- Xilinx, Inc.
- Steven K. Knapp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for propagating data type for circuit design from...
- Patent number 5,422,833
- Issue date Jun 6, 1995
- Xilinx, Inc.
- Steven H. Kelem
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND SYSTEM FOR PROVIDING FAULT TOLERANT LAYOUT OF MASSIVELY...
- Publication number 20240160825
- Publication date May 16, 2024
- Cornami, Inc.
- Muthiah Annamalai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconfigurable Processor Circuit Architecture
- Publication number 20240152486
- Publication date May 9, 2024
- Cornami, Inc.
- Paul L. Master
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconfigurable Processor Circuit Architecture
- Publication number 20230153265
- Publication date May 18, 2023
- Cornami, Inc.
- Paul L. Master
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconfigurable Processor Circuit Architecture
- Publication number 20230055513
- Publication date Feb 23, 2023
- Cornami, Inc.
- Paul L. Master
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconfigurable Processor Circuit Architecture
- Publication number 20210073171
- Publication date Mar 11, 2021
- Cornami, Inc.
- Paul L. Master
- G06 - COMPUTING CALCULATING COUNTING

Steven K. Knapp

Person

Patents Grantslast 30 patents

Reconfigurable processor circuit architecture

Reconfigurable processor circuit architecture

Reconfigurable processor circuit architecture

Methods of authenticating a programmable integrated circuit in comb...

Methods of authenticating a user design in a programmable integrate...

Authentication for information provided to an integrated circuit

Authentication for information provided to an integrated circuit

Method to program non-JTAG attached devices or memories using a PLD...

Parallel interface for configuring programmable devices

Flexible scheme for configuring programmable semiconductor devices...

Method and apparatus to copy protect software programs

Method of optimizing resource allocation starting from a high level...

State splitting for level reduction

Method of allocating logic using general function components

Method for optimizing resource allocation starting from a high level

Method for generating logic modules from a high level block diagram

Method and system for propagating data type for circuit design from...

Patents Applicationslast 30 patents

METHOD AND SYSTEM FOR PROVIDING FAULT TOLERANT LAYOUT OF MASSIVELY...

Reconfigurable Processor Circuit Architecture

Reconfigurable Processor Circuit Architecture

Reconfigurable Processor Circuit Architecture

Reconfigurable Processor Circuit Architecture