Steven R. Bristow

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Tester having device under test power supply
- Patent number 8,207,725
- Issue date Jun 26, 2012
- Intersil Americas Inc.
- Patrick Sullivan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Device under test power supply
- Patent number 7,999,530
- Issue date Aug 16, 2011
- Intersil Americas Inc.
- Patrick Sullivan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor test system having double data rate pin scrambling
- Patent number 6,754,868
- Issue date Jun 22, 2004
- Nextest Systems Corporation
- Steven R. Bristow
- G01 - MEASURING TESTING
Information Patent Grant
Timing signal generator
- Patent number 4,809,221
- Issue date Feb 28, 1989
- Megatest Corporation
- Paul D. Magliocco
- G01 - MEASURING TESTING
Information Patent Grant
Timing signal generator
- Patent number 4,779,221
- Issue date Oct 18, 1988
- Megatest Corporation
- Paul D. Magliocco
- G01 - MEASURING TESTING
Information Patent Grant
Television display alignment system and method
- Patent number 4,099,092
- Issue date Jul 4, 1978
- ATARI, Inc.
- Stephen D. Bristow
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
TESTER HAVING DEVICE UNDER TEST POWER SUPPLY
- Publication number 20110298483
- Publication date Dec 8, 2011
- Intersil Americas Inc.
- Patrick Sullivan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DEVICE UNDER TEST POWER SUPPLY
- Publication number 20100066448
- Publication date Mar 18, 2010
- Intersil Americas Inc.
- Patrick G. Sullivan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor test system having double data rate pin scrambling
- Publication number 20030005381
- Publication date Jan 2, 2003
- Steven R. Bristow
- G01 - MEASURING TESTING