Stillman F. Gates

Person

Los Gatos, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for handling SAS/SATA communication deadlock
- Patent number 7,360,119
- Issue date Apr 15, 2008
- Adaptec, Inc.
- Ross Stenfort
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for configuring separate accessibility of each channel of a...
- Patent number 6,880,033
- Issue date Apr 12, 2005
- Adaptec, Inc.
- Fadi A. Mahmoud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-channel SCSI chips and methods for configuring separate intero...
- Patent number 6,785,746
- Issue date Aug 31, 2004
- Adaptec, Inc.
- Fadi A. Mahmoud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serial bus for connecting two integrated circuits with storage for...
- Patent number 6,516,366
- Issue date Feb 4, 2003
- Adaptec, Incorporated
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Source-destination re-timed cooperative communication bus
- Patent number 6,487,617
- Issue date Nov 26, 2002
- Adaptec, Inc.
- Stillman Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast stack save and restore system and method
- Patent number 6,449,709
- Issue date Sep 10, 2002
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for communication between integrated circuit c...
- Patent number 6,393,576
- Issue date May 21, 2002
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serial port for a hose adapter integrated circuit using a single te...
- Patent number 6,381,688
- Issue date Apr 30, 2002
- Adaptec, Incorporated
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Monitor port with selectable trace support
- Patent number 6,311,303
- Issue date Oct 30, 2001
- Adaptec, Inc.
- Stillman F. Gates
- G01 - MEASURING TESTING
Information Patent Grant
Host adapter having paged payload buffers for simultaneously transf...
- Patent number 6,279,051
- Issue date Aug 21, 2001
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Host adapter having a plurality of register sets and corresponding...
- Patent number 6,240,482
- Issue date May 29, 2001
- Adaptec, Inc.
- Stillman F. Gates
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Host adapter capable of simultaneously transmitting and receiving d...
- Patent number 6,202,105
- Issue date Mar 13, 2001
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Host adapter integrated circuit having autoaccess pause
- Patent number 6,202,117
- Issue date Mar 13, 2001
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Source-destination re-timed cooperative communication bus
- Patent number 6,157,971
- Issue date Dec 5, 2000
- Adaptec, Inc.
- Stillman Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoupled serial memory access with passkey protected memory areas
- Patent number 6,148,384
- Issue date Nov 14, 2000
- Adaptec, Inc.
- Uday N. Devanagundy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-invasive bus master back-off circuit and method for systems hav...
- Patent number 6,112,272
- Issue date Aug 29, 2000
- Adaptec, Inc.
- Stillman Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communications interface adapter for a computer system including po...
- Patent number 6,085,278
- Issue date Jul 4, 2000
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Host adapter having paged data buffers for continuously transferrin...
- Patent number 6,070,200
- Issue date May 30, 2000
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error generation circuit for testing a digital bus
- Patent number 6,049,894
- Issue date Apr 11, 2000
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timer using a single counter to track multiple time-outs
- Patent number 6,002,737
- Issue date Dec 14, 1999
- Adaptec, Inc.
- Uday N. Devanagundy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Host adaptor comprising a status switching circuit which couples an...
- Patent number 5,978,863
- Issue date Nov 2, 1999
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error generation circuit for testing a digital bus
- Patent number 5,978,934
- Issue date Nov 2, 1999
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Host adapter integrated circuit having autoaccess pause
- Patent number 5,960,180
- Issue date Sep 28, 1999
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serial port having only a single terminal for information transfer...
- Patent number 5,920,708
- Issue date Jul 6, 1999
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for automatically loading configuration data o...
- Patent number 5,881,281
- Issue date Mar 9, 1999
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit with a serial port having only one pin
- Patent number 5,826,068
- Issue date Oct 20, 1998
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deskew circuit in a host interface circuit
- Patent number 5,748,806
- Issue date May 5, 1998
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronization circuit for clocked signals of similar frequencies
- Patent number 5,729,719
- Issue date Mar 17, 1998
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for automatically loading configuration data o...
- Patent number 5,727,207
- Issue date Mar 10, 1998
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error generation circuit for testing a digital bus
- Patent number 5,701,409
- Issue date Dec 23, 1997
- Adaptec, Inc.
- Stillman F. Gates
- G06 - COMPUTING CALCULATING COUNTING

Stillman F. Gates

Person

Patents Grantslast 30 patents

Method and apparatus for handling SAS/SATA communication deadlock

Methods for configuring separate accessibility of each channel of a...

Dual-channel SCSI chips and methods for configuring separate intero...

Serial bus for connecting two integrated circuits with storage for...

Source-destination re-timed cooperative communication bus

Fast stack save and restore system and method

Apparatus and method for communication between integrated circuit c...

Serial port for a hose adapter integrated circuit using a single te...

Monitor port with selectable trace support

Host adapter having paged payload buffers for simultaneously transf...

Host adapter having a plurality of register sets and corresponding...

Host adapter capable of simultaneously transmitting and receiving d...

Host adapter integrated circuit having autoaccess pause

Source-destination re-timed cooperative communication bus

Decoupled serial memory access with passkey protected memory areas

Non-invasive bus master back-off circuit and method for systems hav...

Communications interface adapter for a computer system including po...

Host adapter having paged data buffers for continuously transferrin...

Error generation circuit for testing a digital bus

Timer using a single counter to track multiple time-outs

Host adaptor comprising a status switching circuit which couples an...

Error generation circuit for testing a digital bus

Host adapter integrated circuit having autoaccess pause

Serial port having only a single terminal for information transfer...

Method and apparatus for automatically loading configuration data o...

Integrated circuit with a serial port having only one pin

Deskew circuit in a host interface circuit

Synchronization circuit for clocked signals of similar frequencies

Method and apparatus for automatically loading configuration data o...

Error generation circuit for testing a digital bus