Stuart M. Burns

Person

Brookfield, CT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Field effect transistors with vertical gate side walls and method f...
- Patent number 6,593,617
- Issue date Jul 15, 2003
- International Business Machines Corporation
- Diane C. Boyd
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Anisotropic nitride etch process with high selectivity to oxide and...
- Patent number 6,461,529
- Issue date Oct 8, 2002
- International Business Machines Corporation
- Diane C. Boyd
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reactive ion etch loading measurement technique
- Patent number 6,268,226
- Issue date Jul 31, 2001
- International Business Machines Corporation
- David Angell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sacrificial silicon sidewall for damascene gate formation
- Patent number 6,258,679
- Issue date Jul 10, 2001
- International Business Machines Corporation
- Stuart M. Burns
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field effect transistors with improved implants and method for maki...
- Patent number 6,143,635
- Issue date Nov 7, 2000
- International Business Machines Corporation
- Diane C. Boyd
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned diffused source vertical transistors with stack capaci...
- Patent number 6,077,745
- Issue date Jun 20, 2000
- International Business Machines Corporation
- Stuart Mcallister Burns
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making field effect transistors having sub-lithographic...
- Patent number 6,040,214
- Issue date Mar 21, 2000
- International Business Machines Corporation
- Diane C. Boyd
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
2F-square memory cell for gigabit memory applications
- Patent number 6,040,210
- Issue date Mar 21, 2000
- International Business Machines Corporation
- Stuart Mcallister Burns
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned diffused source vertical transistors with deep trench...
- Patent number 6,034,389
- Issue date Mar 7, 2000
- International Business Machines Corporation
- Stuart Mcallister Burns
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
4F-square memory cell having vertical floating-gate transistors wit...
- Patent number 6,033,957
- Issue date Mar 7, 2000
- International Business Machines Corporation
- Stuart Mcallister Burns
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned diffused source vertical transistors with deep trench...
- Patent number 6,013,548
- Issue date Jan 11, 2000
- International Business Machines Corporation
- Stuart Mcallister Burns
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
2F-square memory cell for gigabit memory applications
- Patent number 5,990,509
- Issue date Nov 23, 1999
- International Business Machines Corporation
- Stuart Mcallister Burns
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low pressure and low power C1.sub.2 /HC1 process for sub-micron met...
- Patent number 5,976,986
- Issue date Nov 2, 1999
- International Business Machines Corp.
- Munir D. Naeem
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Silicon sidewall etching
- Patent number 5,895,273
- Issue date Apr 20, 1999
- International Business Machines Corporation
- Stuart M. Burns
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
4F-square memory cell having vertical floating-gate transistors wit...
- Patent number 5,874,760
- Issue date Feb 23, 1999
- International Business Machines Corporation
- Stuart Mcallister Burns
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for metal etching with reduced sidewall build up during int...
- Patent number 5,846,884
- Issue date Dec 8, 1998
- Siemens Aktiengesellschaft
- Munir D. Naeem
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for making doped polysilicon layers on sidewalls
- Patent number 5,759,920
- Issue date Jun 2, 1998
- International Business Machines Corporation
- Stuart Mcallister Burns
- H01 - BASIC ELECTRIC ELEMENTS

Stuart M. Burns

Person

Patents Grantslast 30 patents

Field effect transistors with vertical gate side walls and method f...

Anisotropic nitride etch process with high selectivity to oxide and...

Reactive ion etch loading measurement technique

Sacrificial silicon sidewall for damascene gate formation

Field effect transistors with improved implants and method for maki...

Self-aligned diffused source vertical transistors with stack capaci...

Method for making field effect transistors having sub-lithographic...

2F-square memory cell for gigabit memory applications

Self-aligned diffused source vertical transistors with deep trench...

4F-square memory cell having vertical floating-gate transistors wit...

Self-aligned diffused source vertical transistors with deep trench...

2F-square memory cell for gigabit memory applications

Low pressure and low power C1.sub.2 /HC1 process for sub-micron met...

Silicon sidewall etching

4F-square memory cell having vertical floating-gate transistors wit...

Methods for metal etching with reduced sidewall build up during int...

Process for making doped polysilicon layers on sidewalls